[PATCH 09/23] drm/i915/vrr: Compute vrr vsync if platforms support it

[Ankit Nautiyal]

Previously, TRANS_VRR_VSYNC was exclusively used for panels with
adaptive-sync SDP support in VRR scenarios. However, to drive fixed refresh
rates using the VRR Timing generator, we now need to program
TRANS_VRR_VSYNC regardless of adaptive sync SDP support. Therefore, let's
remove the adaptive sync SDP check and program TRANS_VRR_VSYNC for
platforms that support the register.

v2: Remove check for vrr enable before readback.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4b2630ceb3e0..af96dbe80d85 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -281,7 +281,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 	else
 		intel_vrr_prepare_vrr_timings(crtc_state, vmin, vmax);
 
-	if (intel_dp->as_sdp_supported && intel_vrrtg_is_enabled(crtc_state)) {
+	if (HAS_AS_SDP(display)) {
 		crtc_state->vrr.vsync_start =
 			(crtc_state->hw.adjusted_mode.crtc_vtotal -
 			 crtc_state->hw.adjusted_mode.vsync_start);
@@ -471,17 +471,16 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 						     TRANS_VRR_VMIN(display, cpu_transcoder)) + 1;
 	}
 
-	if (intel_vrrtg_is_enabled(crtc_state)) {
+	if (intel_vrrtg_is_enabled(crtc_state))
 		crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
 
-		if (HAS_AS_SDP(display)) {
-			trans_vrr_vsync =
-				intel_de_read(display,
-					      TRANS_VRR_VSYNC(display, cpu_transcoder));
-			crtc_state->vrr.vsync_start =
-				REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
-			crtc_state->vrr.vsync_end =
-				REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
-		}
+	if (HAS_AS_SDP(display)) {
+		trans_vrr_vsync =
+			intel_de_read(display,
+				      TRANS_VRR_VSYNC(display, cpu_transcoder));
+		crtc_state->vrr.vsync_start =
+			REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
+		crtc_state->vrr.vsync_end =
+			REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
 	}
 }
-- 
2.45.2