[PATCH] drm/i915/dp: Fix bandwidth computation with DSC

[Ankit Nautiyal]

Output format 420 requires half of bandwidth required for 444 format.
Take output format into consideration, while computing required
bandwidth with DSC.
While at it, reorder computations to avoid overflow.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f36035671016..77d9c62186d3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1947,8 +1947,11 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc
 {
 	u32 available_bw, required_bw;
 
-	available_bw = (link_clock * lane_count * timeslots * 16)  / 8;
-	required_bw = compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock));
+	if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
+		compressed_bppx16 /= 2;
+
+	available_bw = (link_clock / 8) * lane_count * timeslots;
+	required_bw = DIV_ROUND_UP(compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock)), 16);
 
 	return available_bw > required_bw;
 }
-- 
2.45.2