[PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Fri Feb 14 09:42:56 UTC 2025
Currently VRR timing generator is used only when VRR is enabled by
userspace. From MTL+, gradually move away from older timing
generator and use VRR timing generator for fixed refresh rate also.
In such a case, Flipline Vmin and Vmax all are set to the Vtotal of the
mode, which effectively makes the VRR timing generator work in
fixed refresh rate mode.
The MSA Vtotal is derived from Vmax register.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 851f5f048e95..8df70cea0146 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -346,7 +346,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
vmin = intel_vrr_compute_vmin(crtc_state);
- if (vmin >= vmax)
+ if (vmin >= vmax && !intel_vrr_always_use_vrr_tg(display))
return;
crtc_state->vrr.vmin = vmin;
@@ -361,7 +361,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
*/
crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
- if (crtc_state->uapi.vrr_enabled)
+ if (crtc_state->uapi.vrr_enabled && vmin < vmax)
intel_vrr_compute_vrr_timings(crtc_state);
else if (is_cmrr_frac_required(crtc_state) && is_edp)
intel_vrr_compute_cmrr_timings(crtc_state);
@@ -545,7 +545,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
if (!HAS_VRR(display))
return false;
- /* #TODO return true for platforms supporting fixed_rr */
+ if (DISPLAY_VER(display) >= 14)
+ return true;
+
return false;
}
--
2.45.2
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