[PATCH 00/11] Panel Replay and Adaptive Sync
Jouni Högander
jouni.hogander at intel.com
Fri Feb 14 14:01:04 UTC 2025
This patch set is adding missing configuration for have Panel Replay
and Adaptive Sync enabled simultaneously. Also some issue identified
while debugging are fixed:
1. Source ALPM configuration has to made during modeset.
2. Sink ALPM configuration has to be done before video stream starts
3. Wrong register field definitions for PORT_ALPM_LFPS_CTL.
Patches are tested on LunarLake using our reference panel supporting
Adaptive Sync and Panel Replay
Animesh Manna (1):
drm/i915/alpm: Add alpm configuration in post plane update
Jouni Högander (10):
drm/i915/psr: Read both Panel Replay capability registers from DPCD
drm/dp: Add Panel Replay capability bits from DP2.1 specification
drm/i915/alpm: Add PR_ALPM_CTL register definitions
drm/i915/alpm: Write PR_ALPM_CTL register
drm/i915/display: Use drm_dp_as_sdp->revision instead of hardcoded 2
drm/i915/display: Use DP_AS_SDP_AVT_FIXED_VTOTAL when Panel Replay
enabled
drm/i915/display: Source is sending FIXED_VTOTAL AS SDPs while PR is
active
drm/i915/alpm: use variable from intel_crtc_state instead of intel_psr
drm/i915/alpm: Fix wrong mask used in REG_FIELD_PREP for some ALPM
field
drm/i915/display: Remove sink ALPM configuration away from PSR code
drivers/gpu/drm/i915/display/intel_alpm.c | 42 ++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 20 +++++++++
drivers/gpu/drm/i915/display/intel_display.c | 3 ++
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++-
.../drm/i915/display/intel_dp_link_training.c | 9 ++--
.../drm/i915/display/intel_dp_link_training.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 40 ++++--------------
drivers/gpu/drm/i915/display/intel_psr_regs.h | 14 ++++++-
include/drm/display/drm_dp.h | 10 ++++-
12 files changed, 113 insertions(+), 47 deletions(-)
--
2.43.0
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