[PATCH v4 6/6] drm/i915/dsc: Check if dsc prefill sufficient for vblank

[Mitul Golani]

Check if dsc prefill latency is sufficient for vblank.

--v2:
- Consider chroma downscaling factor in latency calculation. [Ankit]
- Replace function name from dsc_prefill_time to dsc_prefill_latency.

--v3:
- Remove FIXME tag.[Ankit]
- Replace Ycbcr444 to Ycbcr420.[Anit]
- Correct precision. [Ankit]
- Use some local valiables like linetime_factor and latency to
adjust precision.
- Declare latency to 0 initially to avoid returning any garbage values.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index fe91854e456c..d147835be291 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2292,6 +2292,32 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
 	return 0;
 }
 
+static int
+dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
+{
+	const struct intel_crtc_scaler_state *scaler_state =
+					&crtc_state->scaler_state;
+	int latency = 0;
+	long long  hscale_k =
+		mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16;
+	long long vscale_k =
+		mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16;
+
+	if (!crtc_state->dsc.compression_enable)
+		return 0;
+
+	if (scaler_state->scaler_users) {
+		int chroma_downscaling_factor =
+			crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
+		int linetime_factor = DIV_ROUND_UP(15 * crtc_state->linetime, 10);
+
+		latency = DIV_ROUND_UP_ULL(linetime_factor * hscale_k * vscale_k *
+					   chroma_downscaling_factor, 1000000);
+	}
+
+	return latency;
+}
+
 static int
 scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
 {
@@ -2333,6 +2359,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
 	return crtc_state->framestart_delay +
 		intel_usecs_to_scanlines(adjusted_mode, latency) +
 		scaler_prefill_latency(crtc_state) +
+		dsc_prefill_latency(crtc_state) +
 		wm0_lines >
 		adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
 }
-- 
2.46.0