<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8"/>
<title>Project List - Patchwork</title>
<style id="css-table-select" type="text/css">
td { padding: 2pt; }
</style>
</head>
<body>
<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/72] drm/i915: Remove livelock from "do_idle_maps" vtd w/a</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/84740/">https://patchwork.freedesktop.org/series/84740/</a></td></tr>
<tr><td><b>State:</b></td><td>failure</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9465 -> Trybot_7300</h1>
<h2>Summary</h2>
<p><strong>FAILURE</strong></p>
<p>Serious unknown changes coming with Trybot_7300 absolutely need to be<br />
verified manually.</p>
<p>If you think the reported changes have nothing to do with the changes<br />
introduced in Trybot_7300, please notify your bug team to allow them<br />
to document this new failure mode, which will reduce false positives in CI.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/index.html</p>
<h2>Possible new issues</h2>
<p>Here are the unknown changes that may have been introduced in Trybot_7300:</p>
<h3>IGT changes</h3>
<h4>Possible regressions</h4>
<ul>
<li>igt@gem_exec_suspend@basic-s3:<ul>
<li>fi-snb-2600: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9465/fi-snb-2600/igt@gem_exec_suspend@basic-s3.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-snb-2600/igt@gem_exec_suspend@basic-s3.html">DMESG-WARN</a></li>
</ul>
</li>
</ul>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9465 and Trybot_7300:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 35 pass(s)</li>
<li>Exec time: [0.58, 9.22] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7300 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@amdgpu/amd_basic@semaphore:</p>
<ul>
<li>fi-bdw-5557u: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109271">fdo#109271</a>) +22 similar issues</li>
</ul>
</li>
<li>
<p>igt@core_hotunplug@unbind-rebind:</p>
<ul>
<li>fi-bdw-5557u: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html">WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2283">i915#2283</a>)</li>
</ul>
</li>
<li>
<p>igt@runner@aborted:</p>
<ul>
<li>fi-snb-2600: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-snb-2600/igt@runner@aborted.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/698">i915#698</a>)</li>
</ul>
</li>
<li>
<p>igt@vgem_basic@setversion:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9465/fi-tgl-y/igt@vgem_basic@setversion.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-tgl-y/igt@vgem_basic@setversion.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) +1 similar issue</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>
<p>igt@gem_exec_suspend@basic-s3:</p>
<ul>
<li>fi-tgl-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9465/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1888">i915#1888</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@prime_vgem@basic-fence-flip:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9465/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7300/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html">PASS</a> +1 similar issue</li>
</ul>
</li>
</ul>
<h2>Participating hosts (43 -> 40)</h2>
<p>Missing (3): fi-ilk-m540 fi-bdw-samus fi-hsw-4200u </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9465 -> Trybot_7300</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9465: 5e7767ff97719d9a32ce4f69757d2f4ee1164baa @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5885: d99f644b1868b9c92435b05ebfafa230721cd677 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7300: 2a453d2937661d138ff0d0174968848674414c56 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>2a453d293766 active-32b<br />
1bb68658f3a9 active<br />
dd035e433528 drm/i915: Move saturated workload detection back to the context<br />
c06817027b9d drm/i915/gt: Enable ring scheduling for gen6/7<br />
2e26e1bbc020 drm/i915/gt: Implement ring scheduler for gen6/7<br />
6e14ed8b3040 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
1850a81ad5dd drm/i915/gt: Infrastructure for ring scheduling<br />
c62cd1852142 cl-g6<br />
42d222a3ffe9 drm/i915/gt: Use client timeline address for seqno writes<br />
d67b853fc4ae drm/i915/gt: Support creation of 'internal' rings<br />
4bfa0fee2957 drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
2b0eaa49fb21 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
a7f61ae4f29a drm/i915/gt: Another tweak for flushing the tasklets<br />
0479e2c6294c drm/i915: Move tasklet from execlists to sched<br />
775daf79ca9f drm/i915: Move scheduler queue<br />
7158ddbaa7df drm/i915: Move common active lists from engine to i915_scheduler<br />
a9f5a23efd3f drm/i915: Extend the priority boosting for the display with a deadline<br />
4d4ce8a80846 drm/i915/gt: Specify a deadline for the heartbeat<br />
e14aa7b037e9 drm/i915: Fair low-latency scheduling<br />
e783ece6d896 drm/i915: Fix the iterative dfs for defering requests<br />
929894ac3220 drm/i915: Extract the ability to defer and rerun a request later<br />
ab8551bd689f drm/i915: Extract request suspension from the execlists backend<br />
cd166416aae5 drm/i915: Extract request submission from execlists<br />
e6c949aa9ea1 drm/i915/gt: Remove timeslice suppression<br />
c088dfa9e849 drm/i915: Improve DFS for priority inheritance<br />
3e87a391e81e drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
fea7f95a543c drm/i915/selftests: Measure set-priority duration<br />
69a1697c35df drm/i915: Restructure priority inheritance<br />
f96b084729a9 drm/i915: Teach the i915_dependency to use a double-lock<br />
d37413424e8c drm/i915/gt: Do not suspend bonded requests if one hangs<br />
68df67daed82 drm/i915: Replace engine->schedule() with a known request operation<br />
1e5be8b6b998 drm/i915: Prune empty priolists<br />
ac5bf7ac1972 drm/i915/gt: Defer the kmem_cache_free() until after the HW submit<br />
d32bcad27187 drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
a590b0d75b77 drm/i915: Strip out internal priorities<br />
e81b3d7adbc8 drm/i915/gt: Refactor heartbeat request construction and submission<br />
768d7cd9b4b4 drm/i915/gt: Convert stats.active to plain unsigned int<br />
af90e24b8af4 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
25ac3e89e6b3 drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
11dc0a749b42 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
f62425cf7ba7 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
f6952d2bff20 drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
4e92d05752af drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
6997c1537800 drm/i915: Drop i915_request.lock serialisation around await_start<br />
2e31b2612e24 drm/i915/gem: Optimistically prune dma-resv from the shrinker.<br />
61404e047fcf drm/i915/gt: Prefer recycling an idle fence<br />
79f5ef1bfd6d drm/i915/gt: Consolidate the CS timestamp clocks<br />
f1ca77052775 drm/i915/display: Inject a failure into the initial modeset<br />
b5c819526762 drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock<br />
10181d689b05 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
b50858489a2a drm/i915/selftests: Exercise relative timeline modes<br />
456d9ae36cd3 drm/i915/gt: Use indices for writing into relative timelines<br />
a104d0747405 drm/i915/gt: Add timeline "mode"<br />
89a612c7391d drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
ae207c855876 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
1dfe97cd04fd drm/i915/gt: Track all timelines created using the HWSP<br />
1482772ecd80 drm/i915: Encode fence specific waitqueue behaviour into the wait.flags<br />
2474ecfbd1f9 drm/i915/gt: Track the overall awake/busy time<br />
0f2edfa502ed drm/i915/gem: Drop free_work for GEM contexts<br />
d7d8154268a9 drm/i915/gt: ce->inflight updates are now serialised<br />
446f1acc5198 drm/i915/gt: Simplify virtual engine handling for execlists_hold()<br />
a95e06e2752d drm/i915/gt: Resubmit the virtual engine on schedule-out<br />
351d92322578 drm/i915/gt: Shrink the critical section for irq signaling<br />
4700b132c65d drm/i915/gt: Remove virtual breadcrumb before transfer<br />
ef127bd8f512 drm/i915/gt: Defer schedule_out until after the next dequeue<br />
f1aafbc9f3d2 drm/i915/gt: Decouple inflight virtual engines<br />
6920670087c4 drm/i915/gt: Use virtual_engine during execlists_dequeue<br />
070765d4e649 drm/i915/gt: Replace direct submit with direct call to tasklet<br />
a0e260539c57 drm/i915/gt: Disable preparser around MI_SEMAPHORE_WAIT</p>
</body>
</html>