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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/72] drm/i915: Use cmpxchg64 for 32b compatilibity</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/84859/">https://patchwork.freedesktop.org/series/84859/</a></td></tr>
<tr><td><b>State:</b></td><td>failure</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9478 -> Trybot_7307</h1>
<h2>Summary</h2>
<p><strong>FAILURE</strong></p>
<p>Serious unknown changes coming with Trybot_7307 absolutely need to be<br />
verified manually.</p>
<p>If you think the reported changes have nothing to do with the changes<br />
introduced in Trybot_7307, please notify your bug team to allow them<br />
to document this new failure mode, which will reduce false positives in CI.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/index.html</p>
<h2>Possible new issues</h2>
<p>Here are the unknown changes that may have been introduced in Trybot_7307:</p>
<h3>IGT changes</h3>
<h4>Possible regressions</h4>
<ul>
<li>igt@i915_selftest@live@execlists:<ul>
<li>fi-bdw-5557u: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-bdw-5557u/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-bdw-5557u/igt@i915_selftest@live@execlists.html">INCOMPLETE</a></li>
</ul>
</li>
</ul>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9478 and Trybot_7307:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 35 pass(s)</li>
<li>Exec time: [0.59, 8.92] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7307 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@i915_selftest@live@execlists:</p>
<ul>
<li>
<p>fi-cfl-8109u: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-cfl-8109u/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-cfl-8109u/igt@i915_selftest@live@execlists.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1037">i915#1037</a>)</p>
</li>
<li>
<p>fi-apl-guc: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-apl-guc/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-apl-guc/igt@i915_selftest@live@execlists.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1037">i915#1037</a>)</p>
</li>
<li>
<p>fi-icl-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-icl-u2/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-icl-u2/igt@i915_selftest@live@execlists.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1037">i915#1037</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2276">i915#2276</a>)</p>
</li>
<li>
<p>fi-tgl-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-u2/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-tgl-u2/igt@i915_selftest@live@execlists.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2268">i915#2268</a>)</p>
</li>
<li>
<p>fi-icl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-icl-y/igt@i915_selftest@live@execlists.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-icl-y/igt@i915_selftest@live@execlists.html">INCOMPLETE</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1037">i915#1037</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2276">i915#2276</a>)</p>
</li>
</ul>
</li>
<li>
<p>igt@runner@aborted:</p>
<ul>
<li>
<p>fi-apl-guc: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-apl-guc/igt@runner@aborted.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2295">i915#2295</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2722">i915#2722</a>)</p>
</li>
<li>
<p>fi-kbl-r: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7307/fi-kbl-r/igt@runner@aborted.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1569">i915#1569</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/192">i915#192</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/193">i915#193</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/194">i915#194</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2295">i915#2295</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2722">i915#2722</a>)</p>
</li>
</ul>
</li>
</ul>
<p>{name}: This element is suppressed. This means it is ignored when computing<br />
the status of the difference (SUCCESS, WARNING, or FAILURE).</p>
<h2>Participating hosts (42 -> 39)</h2>
<p>Missing (3): fi-tgl-y fi-bdw-samus fi-hsw-4200u </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9478 -> Trybot_7307</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9478: 94cf3a4cc350324f21728c70954c46e535405c87 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5890: 0e209dc3cd7561a57ec45be74b8b299eaf391950 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7307: 012731eed106b5b4e5b8e40b8c0ff8ccec23cd74 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>012731eed106 drm/i915/gt: Support virtual engine queues<br />
3245e76f8478 active<br />
d624a03e07e0 drm/i915: Move saturated workload detection back to the context<br />
47e5d34d0761 drm/i915/gt: Enable ring scheduling for gen6/7<br />
951b0bcf2f13 drm/i915/gt: Implement ring scheduler for gen6/7<br />
51e61b098505 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
16a8391173ca drm/i915/gt: Infrastructure for ring scheduling<br />
7ba027a0c75f cl-g6<br />
7017c6630566 drm/i915/gt: Use client timeline address for seqno writes<br />
ebd33889de2f drm/i915/gt: Support creation of 'internal' rings<br />
29c459bab75e drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
e6328cd75139 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
47af256baca6 drm/i915/gt: Another tweak for flushing the tasklets<br />
4213d4ae69a5 drm/i915: Move tasklet from execlists to sched<br />
497d7f826d43 drm/i915: Move scheduler queue<br />
7081749d3cd9 drm/i915: Move common active lists from engine to i915_scheduler<br />
f4b391fedad2 drm/i915: Extend the priority boosting for the display with a deadline<br />
5fa10f785f08 drm/i915/gt: Specify a deadline for the heartbeat<br />
3c39bc83ffe1 drm/i915: Fair low-latency scheduling<br />
e598c6ec5716 try_cmpxchg64<br />
52806ae3d89e drm/i915: Fix the iterative dfs for defering requests<br />
1844400e9848 drm/i915: Extract the ability to defer and rerun a request later<br />
b263f8f77607 drm/i915: Extract request suspension from the execlists backend<br />
6ca27399f82c drm/i915: Extract request submission from execlists<br />
436bae02c982 drm/i915/gt: Remove timeslice suppression<br />
20174134b0c1 drm/i915: Improve DFS for priority inheritance<br />
7a8a8647cd3c drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
8c8a5f625307 drm/i915/selftests: Measure set-priority duration<br />
b0ebcc186401 drm/i915: Restructure priority inheritance<br />
20cb76ba9dc8 drm/i915: Teach the i915_dependency to use a double-lock<br />
0307e4c1d878 drm/i915/gt: Do not suspend bonded requests if one hangs<br />
3cf158a99e90 drm/i915: Replace engine->schedule() with a known request operation<br />
d006a2321680 drm/i915: Prune empty priolists<br />
b33eab6ca28d drm/i915/gt: Defer the kmem_cache_free() until after the HW submit<br />
b6482fc9ea27 drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
84b865c1ff88 drm/i915: Strip out internal priorities<br />
486353c88b20 drm/i915/gt: Refactor heartbeat request construction and submission<br />
52e57a7ddfa0 drm/i915/gt: Convert stats.active to plain unsigned int<br />
0252ac5bfae5 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
08f90f75890a drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
2bb94eacd64c drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
1cc26d2a02a7 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
bb7c96e900ed drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
f3d0e1f792af drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
33288eced063 drm/i915: Drop i915_request.lock serialisation around await_start<br />
8cabe0b70d36 drm/i915/gem: Optimistically prune dma-resv from the shrinker.<br />
f0f4413eae20 drm/i915/gt: Prefer recycling an idle fence<br />
5113e82342a3 drm/i915/gt: Consolidate the CS timestamp clocks<br />
3ae5e1dfc01e drm/i915/display: Inject a failure into the initial modeset<br />
60921323d21d drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock<br />
4b2416efa406 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
79f00664ecd8 drm/i915/selftests: Exercise relative timeline modes<br />
b0a8b670331e drm/i915/gt: Use indices for writing into relative timelines<br />
6c0fd68b2bcf drm/i915/gt: Add timeline "mode"<br />
49a690df30a1 drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
2d78dc1ff161 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
bb0634185555 drm/i915/gt: Track all timelines created using the HWSP<br />
19100de42ec7 drm/i915: Encode fence specific waitqueue behaviour into the wait.flags<br />
3605c5f4e58b drm/i915/gt: Track the overall awake/busy time<br />
50160a538f84 drm/i915/gem: Drop free_work for GEM contexts<br />
ed0b30000a29 drm/i915/gt: ce->inflight updates are now serialised<br />
6e2ce8d13e17 drm/i915/gt: Simplify virtual engine handling for execlists_hold()<br />
6b957ee3b280 resubmit-flush<br />
dbf03d5e6c4f drm/i915/gt: Resubmit the virtual engine on schedule-out<br />
c20efa751c23 drm/i915/gt: Shrink the critical section for irq signaling<br />
f660022af4a2 drm/i915/gt: Remove virtual breadcrumb before transfer<br />
2bac06adff21 drm/i915/gt: Defer schedule_out until after the next dequeue<br />
67f31fb50ff6 drm/i915/gt: Decouple inflight virtual engines<br />
b1de55668785 drm/i915/gt: Use virtual_engine during execlists_dequeue<br />
465eb3cd74a2 drm/i915/gt: Replace direct submit with direct call to tasklet<br />
bd01a56eb02d drm/i915/uc: Squelch load failure error message<br />
7d293e286992 drm/i915: Use cmpxchg64 for 32b compatilibity</p>
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