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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/72] drm/i915: Use cmpxchg64 for 32b compatilibity</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/84862/">https://patchwork.freedesktop.org/series/84862/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7309/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7309/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9478 -> Trybot_7309</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7309/index.html</p>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9478 and Trybot_7309:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 37 pass(s)</li>
<li>Exec time: [0.58, 10.22] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7309 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>igt@debugfs_test@read_all_entries:<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@debugfs_test@read_all_entries.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7309/fi-tgl-y/igt@debugfs_test@read_all_entries.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) +2 similar issues</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>igt@fbdev@read:<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@fbdev@read.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7309/fi-tgl-y/igt@fbdev@read.html">PASS</a> +1 similar issue</li>
</ul>
</li>
</ul>
<h2>Participating hosts (42 -> 40)</h2>
<p>Missing (2): fi-bdw-samus fi-hsw-4200u </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9478 -> Trybot_7309</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9478: 94cf3a4cc350324f21728c70954c46e535405c87 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5890: 0e209dc3cd7561a57ec45be74b8b299eaf391950 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7309: bc853e9f5f2c6aa002ded6ffead0e17ee56445e1 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>bc853e9f5f2c drm/i915/gt: Support virtual engine queues<br />
edc0ba0a5c88 active<br />
430ec99cd331 drm/i915: Move saturated workload detection back to the context<br />
75ca4e6016cf drm/i915/gt: Enable ring scheduling for gen6/7<br />
640520be7b83 drm/i915/gt: Implement ring scheduler for gen6/7<br />
0e00997d64ef drm/i915/gt: Enable busy-stats for ring-scheduler<br />
ef9ecf720add drm/i915/gt: Infrastructure for ring scheduling<br />
93423cb0e8d4 cl-g6<br />
0814d171ba93 drm/i915/gt: Use client timeline address for seqno writes<br />
a0dddc85aa72 drm/i915/gt: Support creation of 'internal' rings<br />
a3febcb5a6dd drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
ba0778ff6042 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
e55b8e9ad198 drm/i915/gt: Another tweak for flushing the tasklets<br />
24a8cf1b41b0 drm/i915: Move tasklet from execlists to sched<br />
207c7f7723bb drm/i915: Move scheduler queue<br />
1ad64f541f68 drm/i915: Move common active lists from engine to i915_scheduler<br />
385435425b86 drm/i915: Extend the priority boosting for the display with a deadline<br />
b002cd059b1d drm/i915/gt: Specify a deadline for the heartbeat<br />
9dfecb3670ef drm/i915: Fair low-latency scheduling<br />
f473e2767403 try_cmpxchg64<br />
798603620f47 drm/i915: Fix the iterative dfs for defering requests<br />
585fa8e44c68 drm/i915: Extract the ability to defer and rerun a request later<br />
17063fa7a85d drm/i915: Extract request suspension from the execlists backend<br />
9393759e3c16 drm/i915: Extract request submission from execlists<br />
d16fa94547c8 drm/i915/gt: Remove timeslice suppression<br />
6ee56d34ef0f drm/i915: Improve DFS for priority inheritance<br />
7207ce0bde0f drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
a7c63cfe6736 drm/i915/selftests: Measure set-priority duration<br />
98e45624fce3 drm/i915: Restructure priority inheritance<br />
8c9f2f87e915 drm/i915: Teach the i915_dependency to use a double-lock<br />
fc0f7fe51f0a drm/i915/gt: Do not suspend bonded requests if one hangs<br />
2052883109db drm/i915: Replace engine->schedule() with a known request operation<br />
85dba0723b1a drm/i915: Prune empty priolists<br />
e0b5028a75b6 drm/i915/gt: Defer the kmem_cache_free() until after the HW submit<br />
67adda115b6b drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
d4ef5876f888 drm/i915: Strip out internal priorities<br />
e316072db077 drm/i915/gt: Refactor heartbeat request construction and submission<br />
c563aeb5e33b drm/i915/gt: Convert stats.active to plain unsigned int<br />
f1508b6514e5 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
44b128fe186a drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
6cf6a7b4a91c drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
bbb2a74d9b34 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
2ad0abb39fd9 drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
6d156eae7e85 drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
ed4875eb9912 drm/i915: Drop i915_request.lock serialisation around await_start<br />
5e462daa9834 drm/i915/gem: Optimistically prune dma-resv from the shrinker.<br />
fdda369dad56 drm/i915/gt: Prefer recycling an idle fence<br />
c5edf7242975 drm/i915/gt: Consolidate the CS timestamp clocks<br />
fed15fccf6a0 drm/i915/display: Inject a failure into the initial modeset<br />
e332961d56c0 drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock<br />
9983a5108df5 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
ebd409e1e1ed drm/i915/selftests: Exercise relative timeline modes<br />
1d56b3e393a4 drm/i915/gt: Use indices for writing into relative timelines<br />
fc45a5ffb4e1 drm/i915/gt: Add timeline "mode"<br />
1a995e595e24 drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
6b26ebfa8994 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
6fc7681d30e8 drm/i915/gt: Track all timelines created using the HWSP<br />
f8fd0246f39b drm/i915: Encode fence specific waitqueue behaviour into the wait.flags<br />
2c103e3b335a drm/i915/gt: Track the overall awake/busy time<br />
3585a90101c5 drm/i915/gem: Drop free_work for GEM contexts<br />
42e3c7b8dfd2 drm/i915/gt: ce->inflight updates are now serialised<br />
5f13e4922e5e drm/i915/gt: Simplify virtual engine handling for execlists_hold()<br />
dae0449c8cb6 resubmit-flush<br />
6f31f650ae1c drm/i915/gt: Resubmit the virtual engine on schedule-out<br />
da9a0113c9ce drm/i915/gt: Shrink the critical section for irq signaling<br />
f3c3a6c8ce1f drm/i915/gt: Remove virtual breadcrumb before transfer<br />
b376cd364e6b drm/i915/gt: Defer schedule_out until after the next dequeue<br />
400bc82e1913 drm/i915/gt: Decouple inflight virtual engines<br />
07951025cf86 drm/i915/gt: Use virtual_engine during execlists_dequeue<br />
9294bcdd6016 drm/i915/gt: Replace direct submit with direct call to tasklet<br />
06b861ab2778 drm/i915/uc: Squelch load failure error message<br />
991f84ffbdfa drm/i915: Use cmpxchg64 for 32b compatilibity</p>
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