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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/70] drm/i915/gt: Track all timelines created using the HWSP</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/85138/">https://patchwork.freedesktop.org/series/85138/</a></td></tr>
<tr><td><b>State:</b></td><td>failure</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9509 -> Trybot_7355</h1>
<h2>Summary</h2>
<p><strong>FAILURE</strong></p>
<p>Serious unknown changes coming with Trybot_7355 absolutely need to be<br />
verified manually.</p>
<p>If you think the reported changes have nothing to do with the changes<br />
introduced in Trybot_7355, please notify your bug team to allow them<br />
to document this new failure mode, which will reduce false positives in CI.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/index.html</p>
<h2>Possible new issues</h2>
<p>Here are the unknown changes that may have been introduced in Trybot_7355:</p>
<h3>IGT changes</h3>
<h4>Possible regressions</h4>
<ul>
<li>igt@i915_selftest@live@gt_pm:<ul>
<li>fi-hsw-4770: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html">DMESG-FAIL</a></li>
</ul>
</li>
</ul>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9509 and Trybot_7355:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 35 pass(s)</li>
<li>Exec time: [0.60, 9.70] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7355 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@amdgpu/amd_cs_nop@fork-compute0:</p>
<ul>
<li>fi-tgl-u2: NOTRUN -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-tgl-u2/igt@amdgpu/amd_cs_nop@fork-compute0.html">SKIP</a> (<a href="https://bugs.freedesktop.org/show_bug.cgi?id=109315">fdo#109315</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/2575">i915#2575</a>) +17 similar issues</li>
</ul>
</li>
<li>
<p>igt@vgem_basic@setversion:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-y/igt@vgem_basic@setversion.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-tgl-y/igt@vgem_basic@setversion.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) +1 similar issue</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>
<p>igt@gem_tiled_blits@basic:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-y/igt@gem_tiled_blits@basic.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-tgl-y/igt@gem_tiled_blits@basic.html">PASS</a> +2 similar issues</li>
</ul>
</li>
<li>
<p>igt@i915_selftest@live@hangcheck:</p>
<ul>
<li>fi-tgl-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-u2/igt@i915_selftest@live@hangcheck.html">INCOMPLETE</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-tgl-u2/igt@i915_selftest@live@hangcheck.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@kms_chamelium@dp-edid-read:</p>
<ul>
<li>fi-cml-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2679">i915#2679</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7355/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html">PASS</a></li>
</ul>
</li>
</ul>
<h2>Participating hosts (42 -> 38)</h2>
<p>Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9509 -> Trybot_7355</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9509: 66ecfb1df07b703dc4e83e8c520b186dffe6d2b3 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5913: b30bdfecaf1ff38b83c0bfbcf5981732a968a464 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7355: 65c69455c5317e876e952a24f6bf034f653f776c @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>65c69455c531 rq<br />
40ce35273cdb drm/i915/gt: Enable ring scheduling for gen6/7<br />
a585bc614e8d drm/i915/gt: Implement ring scheduler for gen6/7<br />
a5590698b4f5 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
4a8b4cba1b4b drm/i915/gt: Infrastructure for ring scheduling<br />
c2cc11377dd1 drm/i915/gt: Use client timeline address for seqno writes<br />
a350734efefc drm/i915/gt: Support creation of 'internal' rings<br />
84ea74793187 drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
8097aca7d5f7 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
d1283c224392 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
039210f75ad0 drm/i915/selftests: Exercise relative timeline modes<br />
efcf9bb1f638 drm/i915/gt: Use indices for writing into relative timelines<br />
414c62f35ef3 drm/i915/gt: Add timeline "mode"<br />
eed3290306bc drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
a560e7df5d52 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
520a6b2f66cb drm/i915: Bump default timeslicing quantum to 5ms<br />
501baa50ff61 drm/i915: Replace priolist rbtree with a skiplist<br />
8e2ecee747d4 drm/i915: Move saturated workload detection back to the context<br />
7fa87646bf91 drm/i915/gt: Support virtual engine queues<br />
74ad7515a1cb drm/i915/gt: Skip over completed active execlists, again<br />
acee7cc4cc48 drm/i915: Move tasklet from execlists to sched<br />
ad665a4b019c drm/i915: Move scheduler queue<br />
62b317e89508 drm/i915: Move common active lists from engine to i915_scheduler<br />
659af4e6c8a8 drm/i915: Extend the priority boosting for the display with a deadline<br />
9f1b8335098d drm/i915/gt: Specify a deadline for the heartbeat<br />
ea0f403871a8 drm/i915: Fair low-latency scheduling<br />
f1cec99f4659 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper<br />
64239a69ed83 drm/i915: Fix the iterative dfs for defering requests<br />
c3824b782424 drm/i915: Extract the ability to defer and rerun a request later<br />
1493ef4f0252 drm/i915: Extract request suspension from the execlists backend<br />
95aa027a1c03 drm/i915: Extract request rewinding from execlists<br />
833597e438b2 drm/i915: Extract request submission from execlists<br />
cef07ebddf38 drm/i915/gt: Remove timeslice suppression<br />
8825a3b43e80 drm/i915: Improve DFS for priority inheritance<br />
47abf61c05a7 drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
20d4a25363a5 drm/i915/selftests: Measure set-priority duration<br />
afb302f38a57 drm/i915: Restructure priority inheritance<br />
d40f3d32d7d1 drm/i915: Teach the i915_dependency to use a double-lock<br />
f1a542f23995 drm/i915/gt: Do not suspend bonded requests if one hangs<br />
9c668fe493d5 drm/i915: Replace engine->schedule() with a known request operation<br />
a2d4ac3c69fe drm/i915: Prune empty priolists<br />
795f7eec088d drm/i915/gt: Defer the kmem_cache_free() until after the HW submit<br />
a8099136259c drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
3baa6b0588ac drm/i915: Strip out internal priorities<br />
303bb520027f drm/i915/gt: Refactor heartbeat request construction and submission<br />
5e85f29b3339 drm/i915/gt: Convert stats.active to plain unsigned int<br />
394bd43e99fe drm/i915/gt: Extract busy-stats for ring-scheduler<br />
5a8a141ce4d8 drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
d6989f380341 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
0e46d8f68ccf drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
4c2b0f1fab6d drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
71b911f69054 drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
c2296d7ad4c1 drm/i915: Drop i915_request.lock serialisation around await_start<br />
69f494cf0265 drm/i915/gem: Optimistically prune dma-resv from the shrinker.<br />
12eb183f5c77 drm/i915/gt: Prefer recycling an idle fence<br />
a955bc9702ee drm/i915/gt: Consolidate the CS timestamp clocks<br />
802c0dd849ee drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock<br />
8387c335ea62 drm/i915/gt: ce->inflight updates are now serialised<br />
50702f309ee6 drm/i915/gt: Simplify virtual engine handling for execlists_hold()<br />
7d9aef861391 drm/i915/gt: Resubmit the virtual engine on schedule-out<br />
16ce5fd0f19c drm/i915/gt: Shrink the critical section for irq signaling<br />
30b9c5e891b3 drm/i915/gt: Remove virtual breadcrumb before transfer<br />
3911d62bf9d5 drm/i915/gt: Defer schedule_out until after the next dequeue<br />
dd6ab25cfc7d drm/i915/gt: Decouple inflight virtual engines<br />
bc7ca1cd4327 drm/i915/gt: Use virtual_engine during execlists_dequeue<br />
9b2f83961e9c drm/i915/gt: Replace direct submit with direct call to tasklet<br />
d279af15f24a drm/i915/uc: Squelch load failure error message<br />
7e869b6be525 drm/i915: Use cmpxchg64 for 32b compatilibity<br />
09c61b036a49 drm/i915/gt: Mark client timelines as WC<br />
baed40cbc099 drm/i915/gt: Track all timelines created using the HWSP</p>
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