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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/64] drm/i915: Use cmpxchg64 for 32b compatilibity</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/85168/">https://patchwork.freedesktop.org/series/85168/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9514 -> Trybot_7357</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/index.html</p>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9514 and Trybot_7357:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 35 pass(s)</li>
<li>Exec time: [0.56, 9.23] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7357 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>igt@gem_basic@create-fd-close:<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9514/fi-tgl-y/igt@gem_basic@create-fd-close.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/fi-tgl-y/igt@gem_basic@create-fd-close.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) +2 similar issues</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>
<p>igt@i915_selftest@live@gt_heartbeat:</p>
<ul>
<li>fi-kbl-soraka: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9514/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html">DMESG-FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2291">i915#2291</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/541">i915#541</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@prime_self_import@basic-with_two_bos:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9514/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7357/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html">PASS</a> +1 similar issue</li>
</ul>
</li>
</ul>
<h2>Participating hosts (43 -> 38)</h2>
<p>Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9514 -> Trybot_7357</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9514: 5944be99a80f5839401cfef97be6177b38fda6e9 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5916: 2100c6efd2de767a876977ae1a8a6366e4beb643 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7357: 0b5a90545bbf9f345f3e52b2f7b394f0c01eb76f @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>0b5a90545bbf rq<br />
25f1349085c9 drm/i915/gt: Enable ring scheduling for gen6/7<br />
7f00ce083699 drm/i915/gt: Implement ring scheduler for gen6/7<br />
677ff2d74cd2 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
2bfc49be2df0 drm/i915/gt: Infrastructure for ring scheduling<br />
e9e69b980f32 drm/i915/gt: Use client timeline address for seqno writes<br />
9113e0df1a20 drm/i915/gt: Support creation of 'internal' rings<br />
30a7693ba3b1 drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
2a8af28761bb Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
3b92cef460c3 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
491b77dc813e drm/i915/selftests: Exercise relative timeline modes<br />
b1fdd61898fb drm/i915/gt: Use indices for writing into relative timelines<br />
96b604f81d21 drm/i915/gt: Add timeline "mode"<br />
819fcef16cec drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
8bfff60981ef drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
d2c17417f5ee drm/i915: Bump default timeslicing quantum to 5ms<br />
0b7ab04db797 drm/i915: Move saturated workload detection back to the context<br />
f85efecf221f drm/i915/gt: Support virtual engine queues<br />
a30ee6d84f38 drm/i915/gt: Skip over completed active execlists, again<br />
82c9782685d9 drm/i915: Extend the priority boosting for the display with a deadline<br />
80958afac059 drm/i915/gt: Specify a deadline for the heartbeat<br />
168b8285c665 drm/i915: Fair low-latency scheduling<br />
bbaba7ac4409 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper<br />
4758c8524ede drm/i915: Replace priolist rbtree with a skiplist<br />
72db8cf1bcb6 drm/i915: Move tasklet from execlists to sched<br />
f6ddf3d1fa3d drm/i915: Move scheduler queue<br />
8899b601fecd drm/i915: Move common active lists from engine to i915_scheduler<br />
ea5a37103bfc drm/i915: Fix the iterative dfs for defering requests<br />
86c52df4c88c drm/i915: Extract the ability to defer and rerun a request later<br />
f951a567e344 drm/i915: Extract request suspension from the execlists backend<br />
55d67306bacb drm/i915: Extract request rewinding from execlists<br />
50167d3df5bb drm/i915: Extract request submission from execlists<br />
e826352fe530 drm/i915: Improve DFS for priority inheritance<br />
468ef287489c drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
d95bb1bc57ae drm/i915/selftests: Measure set-priority duration<br />
b14b646b9959 drm/i915: Restructure priority inheritance<br />
c7c6db08f35a drm/i915: Teach the i915_dependency to use a double-lock<br />
a1d9eb321458 drm/i915: Replace engine->schedule() with a known request operation<br />
5cb8e10ee155 drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
dfe71c6332c1 drm/i915: Strip out internal priorities<br />
6fce83742c99 drm/i915/gt: Remove timeslice suppression<br />
c63bec9e7b98 drm/i915/gt: Do not suspend bonded requests if one hangs<br />
dcc1676f5dd5 drm/i915/gt: Refactor heartbeat request construction and submission<br />
8da2f8782c96 drm/i915/gt: Convert stats.active to plain unsigned int<br />
f0f98148d763 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
d5a6a957ddf6 drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
24e8df28b885 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
26d51d99a770 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
3e53b83f63e2 drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
b4372fd04dea drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
43a2ac0063cf drm/i915: Drop i915_request.lock serialisation around await_start<br />
077814f26c43 drm/i915/gt: Consolidate the CS timestamp clocks<br />
77d1994044fe drm/i915/selftests: Confirm CS_TIMESTAMP / CTX_TIMESTAMP share a clock<br />
0e9f0c99169b drm/i915/gt: ce->inflight updates are now serialised<br />
4c4b45274593 drm/i915/gt: Simplify virtual engine handling for execlists_hold()<br />
0e20908724ee drm/i915/gt: Resubmit the virtual engine on schedule-out<br />
d9bb1cb51f18 drm/i915/gt: Shrink the critical section for irq signaling<br />
a20f2a57a6e5 drm/i915/gt: Remove virtual breadcrumb before transfer<br />
5856be1d39dc drm/i915/gt: Defer schedule_out until after the next dequeue<br />
b71597005343 drm/i915/gt: Decouple inflight virtual engines<br />
232b5585ece9 drm/i915/gt: Use virtual_engine during execlists_dequeue<br />
761ea109e69a drm/i915/gt: Replace direct submit with direct call to tasklet<br />
3148e41f2de8 drm/i915/uc: Squelch load failure error message<br />
2024da36ffda drm/i915: Use cmpxchg64 for 32b compatilibity</p>
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