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<b>Patch Details</b>
<table>
<tr><td><b>Series:</b></td><td>series starting with [01/54] drm/i915/gt: Cancel submitted requests upon context reset</td></tr>
<tr><td><b>URL:</b></td><td><a href="https://patchwork.freedesktop.org/series/85239/">https://patchwork.freedesktop.org/series/85239/</a></td></tr>
<tr><td><b>State:</b></td><td>success</td></tr>
<tr><td><b>Details:</b></td><td><a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/index.html">https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/index.html</a></td></tr>
</table>
<h1>CI Bug Log - changes from CI_DRM_9527 -> Trybot_7364</h1>
<h2>Summary</h2>
<p><strong>SUCCESS</strong></p>
<p>No regressions found.</p>
<p>External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/index.html</p>
<h2>New tests</h2>
<p>New tests have been introduced between CI_DRM_9527 and Trybot_7364:</p>
<h3>New IGT tests (1)</h3>
<ul>
<li>igt@i915_selftest@live@scheduler:<ul>
<li>Statuses : 34 pass(s)</li>
<li>Exec time: [0.59, 9.32] s</li>
</ul>
</li>
</ul>
<h2>Known issues</h2>
<p>Here are the changes found in Trybot_7364 that come from known issues:</p>
<h3>IGT changes</h3>
<h4>Issues hit</h4>
<ul>
<li>
<p>igt@debugfs_test@read_all_entries:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9527/fi-tgl-y/igt@debugfs_test@read_all_entries.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/fi-tgl-y/igt@debugfs_test@read_all_entries.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) +2 similar issues</li>
</ul>
</li>
<li>
<p>igt@kms_chamelium@dp-crc-fast:</p>
<ul>
<li>fi-icl-u2: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9527/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html">PASS</a> -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html">FAIL</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/1161">i915#1161</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/262">i915#262</a>)</li>
</ul>
</li>
</ul>
<h4>Possible fixes</h4>
<ul>
<li>
<p>igt@gem_exec_suspend@basic-s3:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9527/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/2411">i915#2411</a> / <a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html">PASS</a></li>
</ul>
</li>
<li>
<p>igt@vgem_basic@create:</p>
<ul>
<li>fi-tgl-y: <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9527/fi-tgl-y/igt@vgem_basic@create.html">DMESG-WARN</a> (<a href="https://gitlab.freedesktop.org/drm/intel/issues/402">i915#402</a>) -> <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7364/fi-tgl-y/igt@vgem_basic@create.html">PASS</a> +2 similar issues</li>
</ul>
</li>
</ul>
<h2>Participating hosts (40 -> 38)</h2>
<p>Missing (2): fi-bsw-cyan fi-bdw-samus </p>
<h2>Build changes</h2>
<ul>
<li>Linux: CI_DRM_9527 -> Trybot_7364</li>
</ul>
<p>CI-20190529: 20190529<br />
CI_DRM_9527: 5f4ab60f910567453058c32e806ed10cc72cd8d7 @ git://anongit.freedesktop.org/gfx-ci/linux<br />
IGT_5922: 334f0c326bb2812e7a2764dc63ff83c83b6daf58 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools<br />
Trybot_7364: 529944268451c2f6e56dea26be8a194aad179279 @ git://anongit.freedesktop.org/gfx-ci/linux</p>
<p>== Linux commits ==</p>
<p>529944268451 drm/i915/gt: Limit C-states while waiting for requests<br />
8c8a1ae8b7fa drm/i915/gt: Enable ring scheduling for gen6/7<br />
786066ef6fde drm/i915/gt: Implement ring scheduler for gen6/7<br />
9d1356a58686 drm/i915/gt: Enable busy-stats for ring-scheduler<br />
294b46165942 drm/i915/gt: Infrastructure for ring scheduling<br />
7a2e24bbfb22 drm/i915/gt: Use client timeline address for seqno writes<br />
33526b16c134 drm/i915/gt: Support creation of 'internal' rings<br />
b8833440013b drm/i915/gt: Couple tasklet scheduling for all CS interrupts<br />
bb28dbfffca9 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"<br />
f444d656676c drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines<br />
dcd3b7d6c646 drm/i915/selftests: Exercise relative timeline modes<br />
75bab4d64db4 drm/i915/gt: Use indices for writing into relative timelines<br />
f658c93e09ef drm/i915/gt: Add timeline "mode"<br />
30b0f2e2fe08 drm/i915/gt: Track timeline GGTT offset separately from subpage offset<br />
08cc97219488 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb<br />
425540be3d08 drm/i915: Bump default timeslicing quantum to 5ms<br />
85e7c1c5f336 drm/i915: Move saturated workload detection back to the context<br />
6b917c5702fa drm/i915/gt: Support virtual engine queues<br />
c59c3438564e drm/i915: Extend the priority boosting for the display with a deadline<br />
29e1c5093e4d drm/i915/gt: Specify a deadline for the heartbeat<br />
42de867efbf0 drm/i915: Fair low-latency scheduling<br />
7e537a663ff4 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper<br />
5a0359fd7ef7 drm/i915: Replace priolist rbtree with a skiplist<br />
429fa1a12bf0 drm/i915: Move tasklet from execlists to sched<br />
2b5e31967045 drm/i915: Move scheduler queue<br />
83fbd2946216 drm/i915: Move common active lists from engine to i915_scheduler<br />
e64510b0b75b drm/i915: Fix the iterative dfs for defering requests<br />
826694c1ec73 drm/i915: Extract the ability to defer and rerun a request later<br />
d79d76849c10 drm/i915: Extract request suspension from the execlists backend<br />
e28eef2f3174 drm/i915: Extract request rewinding from execlists<br />
60b7d45c5c0a drm/i915: Extract request submission from execlists<br />
71ef0e8cbf9e drm/i915: Improve DFS for priority inheritance<br />
724dc9ed5023 drm/i915/selftests: Exercise priority inheritance around an engine loop<br />
9443f3f34b90 drm/i915/selftests: Measure set-priority duration<br />
e4444c66ff23 drm/i915: Restructure priority inheritance<br />
68a8024abbba drm/i915: Teach the i915_dependency to use a double-lock<br />
a90c3017c80e drm/i915: Replace engine->schedule() with a known request operation<br />
7b893bb90534 drm/i915: Remove I915_USER_PRIORITY_SHIFT<br />
87b57067efbe drm/i915: Strip out internal priorities<br />
0d8b76594ef3 drm/i915/gt: Skip over completed active execlists, again<br />
171d6bd4a66f drm/i915/gt: Remove timeslice suppression<br />
fecf2c584794 drm/i915/gt: Do not suspend bonded requests if one hangs<br />
781e58f11312 drm/i915/gt: Convert stats.active to plain unsigned int<br />
ab7beb54cb27 drm/i915/gt: Extract busy-stats for ring-scheduler<br />
9cb8e9030055 drm/i915/gt: Drop atomic for engine->fw_active tracking<br />
a65856dd7185 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()<br />
ee306f366e42 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()<br />
72aa69df14b2 drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source<br />
6a9d1b7d7a8a drm/i915: Drop i915_request.lock requirement for intel_rps_boost()<br />
7cc2c3354cd4 drm/i915: Drop i915_request.lock serialisation around await_start<br />
68735f41206c drm/i915: Mark up protected uses of 'i915_request_completed'<br />
d30eac15aa1b drm/i915/gem: Peek at the inflight context<br />
d47de9fd48f9 drm/i915/gt: Pull context closure check from request submit to schedule-in<br />
499d22356c42 drm/i915/gt: Cancel submitted requests upon context reset</p>
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