[Intel-gfx] [PATCH] drm/i915: Attempt to recover from page table errors.

Eric Anholt eric at anholt.net
Sun Dec 14 19:41:47 CET 2008


On Sun, 2008-12-14 at 04:53 +0800, Zhenyu Wang wrote:
> On 2008.12.11 19:59:12 -0800, Eric Anholt wrote:
> > +static int
> > +i915_reset_render_and_ring(struct drm_device *dev)
> > +{
> > +	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> > +	int ret, i;
> > +	u8 gdrst;
> > +
> > +	/* XXX: need more locking */
> > +
> > +	/* We need GEM control if we're to do this recovery.  Otherwise, the
> > +	 * X Server has its own idea of what the ring state is.
> > +	 */
> > +	if (dev_priv->ring.ring_obj == NULL) {
> > +		DRM_ERROR("Can't reset the device in non-GEM mode\n");
> > +		return -EINVAL;
> > +	}
> > +
> > +	/* Only one we've done reset for so far. */
> > +	if (!IS_I965G(dev)) {
> > +		DRM_ERROR("Can't reset non-G965-class devices\n");
> > +		return -EINVAL;
> > +	}
> > +
> > +	pci_read_config_byte(dev->pdev, GDRST, &gdrst);
> > +	if (gdrst & GDRST_ENABLE) {
> > +		DRM_ERROR("Reset started with reset bit already set!\n");
> > +		return -EBUSY;
> > +	}
> > +
> > +	pci_write_config_byte(dev->pdev, GDRST, GDRST_ENABLE | GDRST_RENDER);
> > +
> > +	for (i = 0; i < 100000; i++) {
> > +		pci_read_config_byte(dev->pdev, GDRST, &gdrst);
> > +		if ((gdrst & GDRST_ENABLE) == 0)
> > +			break;
> > +	}
> > +	if (i == 1000000)
> > +		DRM_ERROR("Failed to reset the render engine\n");
> 
> Last time I played with graphics reset bit, I used script like:
> 
>     setpci -s 00:02.0 c0.b=0x1
>     sleep 1 # this should wait for reset to be effect
>     setpci -s 00:02.0 c0.b=0x0
>     vbetool post
> 
> I think setting reset enable bit back to 0 might be the trick here,
> otherwise post didn't seem to work at all.
> 
> Really nice to see we can finally reach a reset solution with
> gem & kms landing. ;)

The excerpt from the spec was:
> Setting this bit asserts graphics-only reset. The clock domains to be
> reset are determined
> by GRDOM. Hardware resets this bit when the reset is complete. Setting
> this bit without
> waiting for it to clear, is undefined behavior.

so it doesn't look like we should have to, but I'll give it a shot.

-- 
Eric Anholt
eric at anholt.net                         eric.anholt at intel.com


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