[Intel-gfx] [Linux-gfx] [RFC] cherry-pick texture indirections fix to intel-2008-q3

[Eric Anholt]

On Mon, 2008-10-06 at 10:20 -0700, Ian Romanick wrote:
> On Sun, 2008-10-05 at 14:48 -0700, Eric Anholt wrote:
> > I'd like to get this fix into intel-2008-q3.  It seems many games are built
> > to take full advantage of 4 texture indirections, as multiple vendors happened
> > to support just that many, and we were failing at it.  However, I haven't
> 
> 4 is the minimum maximum required by the ARB_fp spec, so this isn't
> surprising.
> 
> > actually had a chance to run any of those games (commercial stuff under wine,
> > mostly), so I'd really like to have some additional review for merging.
> > Ideally the reviewer has access to 945 specs and can see if what I changed it
> > to really matches what they interpret from the specs, but even comparing
> > against ARB_fp specs for sanity couldn't hurt.
> 
> Do you have any fragment programs that work with the patch but fail
> without?

Only the piglit regression test programs that I cooked up just to
exercise the bug (fp-indirections test).

> Comparing to the spec, there are two cases where a new indirection is
> counted:
> 
>     "1. the source coordinate of the texture instruction is a
>        temporary that has already been written in the current node, 
>        either by a previous texture instruction or ALU instruction;
> 
>     2. the result of the texture instruction is a temporary that 
>        has already been read or written in the current node by an 
>        ALU instruction."
> 
> Your patch seems to correct #1, but I don't see #2 accounted for.  Is
> that handled in code not shown in the patch?  There's some pseudo-code
> in the spec (see issue #24) that shows what the counting rules are.
> Since these are pretty much the same was the rules for DX, I can't
> imaging our hardware doing anything different.

As far as I could read from our spec, we don't care about where the
results go.

-- 
Eric Anholt
eric at anholt.net                         eric.anholt at intel.com


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