[Intel-gfx] [patch] Use non-reserved status page index for breadcrumb

[Keith Packard]

From 9adc2aef9e407a4e2eb60ae7fd93cf9ae744a594 Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp at keithp.com>
Date: Tue, 14 Oct 2008 16:51:03 -0700
Subject: [PATCH] [drivers/gpu/drm/i915] Use non-reserved status page index for breadcrumb

Dwords 0 through 0x1f are reserved for use by the hardware. Move the GEM
breadcrumb from 0x10 to 0x20 to keep out of this area.

Signed-off-by: Keith Packard <keithp at keithp.com>
---
 drivers/gpu/drm/i915/i915_drv.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7401123..c81596c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -602,11 +602,11 @@ extern void opregion_enable_asle(struct drm_device *dev);
  * 5: ring 1 head pointer (915-class)
  * 6: ring 2 head pointer (915-class)
  *
- * The area from dword 0x10 to 0x3ff is available for driver usage.
+ * The area from dword 0x20 to 0x3ff is available for driver usage.
  */
 #define READ_HWSP(dev_priv, reg)  (((volatile u32*)(dev_priv->hw_status_page))[reg])
 #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
-#define I915_GEM_HWS_INDEX		0x10
+#define I915_GEM_HWS_INDEX		0x20
 
 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
-- 
1.5.6.5


-- 
keith.packard at intel.com
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