[Intel-gfx] [PATCH] Make GTT dumper work on other 9XX chips
Eric Anholt
eric at anholt.net
Wed Oct 15 09:03:09 CEST 2008
On Wed, 2008-10-15 at 13:43 +0800, Zhenyu Wang wrote:
> From 16096a2b7209622ddcb6bb6c0fbe6b6d60db59ea Mon Sep 17 00:00:00 2001
> From: Zhenyu Wang <zhenyu.z.wang at intel.com>
> Date: Wed, 15 Oct 2008 13:57:07 +0800
> Subject: [PATCH] Make GTT dump work on other 9XX chips
>
> ---
> src/reg_dumper/gtt.c | 26 ++++++++++++++++++++++++--
> 1 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/src/reg_dumper/gtt.c b/src/reg_dumper/gtt.c
> index cf9e37a..197036b 100644
> --- a/src/reg_dumper/gtt.c
> +++ b/src/reg_dumper/gtt.c
> @@ -43,15 +43,37 @@ int main(int argc, char **argv)
> I830Rec i830;
> I830Ptr pI830 = &i830;
> int gtt_base, start, aper_size;
> +
> intel_i830rec_init(pI830);
>
> + if (!IS_I9XX(pI830)) {
> + printf("Unsupported chipset for gtt dumper\n");
> + exit(1);
> + }
> +
> if (IS_G4X(pI830) || IS_GM45(pI830))
> gtt_base = MB(2);
> + else if (IS_I965G(pI830))
> + gtt_base = KB(512);
> else {
> - printf("Unsupported chipset for gtt dumper\n");
> + /* 915/945 chips has GTT range in bar 3*/
> + int err = 0;
> + gtt_base = 0;
> + pci_device_unmap_range (pI830->pci_dev, (void*)pI830->mmio,
> + pI830->pci_dev->regions[0].size);
> + err = pci_device_map_range (pI830->pci_dev,
> + pI830->pci_dev->regions[3].base_addr,
> + pI830->pci_dev->regions[3].size,
> + PCI_DEV_MAP_FLAG_WRITABLE,
> + (void **)&pI830->mmio);
> + if (err != 0) {
> + fprintf(stderr, "mapping GTT bar failed\n");
> + exit(1);
> + }
> }
Nice, but could you replace the INGTT() macro with something referencing
the appropriate BAR instead of spamming pI830->mmio with something that
isn't the mmio BAR?
--
Eric Anholt
eric at anholt.net eric.anholt at intel.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 197 bytes
Desc: This is a digitally signed message part
URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20081015/338989ba/attachment.sig>
More information about the Intel-gfx
mailing list