[Intel-gfx] [PATCH] Check display stride limit when allocate front buffer

[Zhenyu Wang]

On 2008.09.10 11:19:15 -0700, Eric Anholt wrote:
> On Wed, 2008-09-10 at 10:33 +0800, Zhenyu Wang wrote:
> > Subject: [PATCH] Check display stride limit when allocate front buffer
> > 
> > ---
> >  src/i830_memory.c |   27 +++++++++++++++++++++++++++
> >  1 files changed, 27 insertions(+), 0 deletions(-)
> > 
> > diff --git a/src/i830_memory.c b/src/i830_memory.c
> > index 443cc4e..2119012 100644
> > --- a/src/i830_memory.c
> > +++ b/src/i830_memory.c
> > @@ -158,6 +158,27 @@ i830_get_fence_size(ScrnInfoPtr pScrn, unsigned long size)
> >  }
> >  
> >  static Bool
> > +i830_display_stride_ok(ScrnInfoPtr pScrn, int stride, Bool tiling)
> > +{
> > +    I830Ptr pI830 = I830PTR(pScrn);
> > +    int limit = KB(32);
> > +
> > +    if ((IS_845G(pI830) || IS_I85X(pI830)) && tiling)
> > +	limit = KB(8);
> 
> For 855 and 865 the limit I see for DSP[AB]STRIDE in the docs is 8kb,
> always (though, of course, 865 doesn't have B).
> 

yep, doc says 8Kb always, but from my testing linear allocation can actually
go higher, and 8kb will prohibit virtual width above 2048, which might break
some clone config.

-- 
Open Source Technology Center, Intel ltd.

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