[Intel-gfx] [PATCH] drm/i915: save/restore fence registers across suspend/resume

[Dan Nicholson]

On Thu, Apr 30, 2009 at 1:26 PM, Keith Packard <keithp at keithp.com> wrote:
> This makes software fallbacks not do tiling wrong on i965 and later after
> resume. It also should fix 945 performance reduction after resume which
> would have disabled tiling without causing any visible effect.
>
> Signed-off-by: Keith Packard <keithp at keithp.com>

No comments on the meat of the patch, but...

> ---
>  drivers/gpu/drm/i915/Makefile        |    1 -
>  drivers/gpu/drm/i915/i915_drv.h      |    7 +++++++
>  drivers/gpu/drm/i915/i915_suspend.c  |   24 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_display.c |    4 ++--
>  4 files changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 184b8bf..51c5a05 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -13,7 +13,6 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
>          intel_crt.o \
>          intel_lvds.o \
>          intel_bios.o \
> -         intel_dp.o \
>          intel_hdmi.o \
>          intel_sdvo.o \
>          intel_modes.o \

I don't think you meant to include this.

> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d7471fe..6c399e8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -283,6 +283,7 @@ typedef struct drm_i915_private {
>        u8 saveAR[21];
>        u8 saveDACMASK;
>        u8 saveCR[37];
> +       uint64_t saveFENCE[16];
>
>        struct {
>                struct drm_mm gtt_space;
> @@ -712,6 +713,12 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
>                                 writel(upper_32_bits(val), dev_priv->regs + \
>                                        (reg) + 4))
>  #endif
> +#ifdef readq
> +#define I915_READ64(reg)       readq(dev_priv->regs + (reg))
> +#else
> +#define I915_READ64(reg, val)  (((uint64_t) readl(dev_priv->regs + (reg))) | \
> +                                ((uint64_t) readl(dev_priv->regs + (reg) + 4) << 32))
> +#endif

I don't think you want the val argument for the fallback I915_READ64.
I'm sure this was just a copy-paste-o.

>  #define POSTING_READ(reg)      (void)I915_READ(reg)
>
>  #define I915_VERBOSE 0
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index d669cc2..8727894 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -349,6 +349,18 @@ int i915_save_state(struct drm_device *dev)
>        for (i = 0; i < 3; i++)
>                dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
>
> +       /* Fences */
> +       if (IS_I965G(dev)) {
> +               for (i = 0; i < 16; i++)
> +                       dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
> +       } else {
> +               for (i = 0; i < 8; i++)
> +                       dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
> +
> +               if (IS_I9XX(dev))
> +                       for (i = 0; i < 8; i++)
> +                               dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
> +       }
>        i915_save_vga(dev);
>
>        return 0;
> @@ -371,6 +383,18 @@ int i915_restore_state(struct drm_device *dev)
>        /* Display arbitration */
>        I915_WRITE(DSPARB, dev_priv->saveDSPARB);
>
> +       /* Fences */
> +       if (IS_I965G(dev)) {
> +               for (i = 0; i < 16; i++)
> +                       I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]);
> +       } else {
> +               for (i = 0; i < 8; i++)
> +                       I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]);
> +               if (IS_I9XX(dev))
> +                       for (i = 0; i < 8; i++)
> +                               I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]);
> +       }
> +
>        /* Pipe & plane A info */
>        /* Prime the clock */
>        if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b6bedd9..761567f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1278,8 +1278,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
>
>        /* The Display Port M/N ratio needs to be set before the DPLL is enabled
>         */
> -       if (is_dp)
> -               intel_dp_set_m_n(crtc, mode, adjusted_mode);
> +//     if (is_dp)
> +//             intel_dp_set_m_n(crtc, mode, adjusted_mode);
>
>        I915_WRITE(fp_reg, fp);
>        I915_WRITE(dpll_reg, dpll);

Pretty sure you didn't want this part, either. :)

--
Dan