[Intel-gfx] Flickering i915

[Chris Wilson]

On Tue, 2009-08-04 at 21:58 -0500, Jesse Barnes wrote:
> Hopefully it'll be easy to fix with the debug output of a kernel
> running with the last two patches applied.

Here's 'dmesg | grep drm' from boot of a current drm-intel-next:
[drm] Initialized drm 1.1.0 20060810
[drm:drm_init], 
[drm:drm_get_dev], 
[drm:drm_get_minor], 
[drm:drm_get_minor], new minor assigned 64
[drm:drm_get_minor], 
[drm:drm_get_minor], new minor assigned 0
[drm:drm_agp_bind_pages], 
[drm] failed to find VBIOS tables
[drm:drm_irq_install], irq=16
[drm:intel_modeset_init], 2 display pipes available.
[drm:drm_sysfs_connector_add], adding "VGA-1" to sysfs
[drm:drm_sysfs_hotplug_event], generating hotplug event
[drm:drm_sysfs_connector_add], adding "LVDS-1" to sysfs
[drm:drm_sysfs_hotplug_event], generating hotplug event
[drm:drm_helper_probe_single_connector_modes], VGA-1
[drm:intel_update_watermarks], plane A (pipe 0) clock: 31500
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 5
[drm:intel_calculate_wm], FIFO watermark level: 21
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 21, B: 29
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 21, B: 29, C: 2, SR 83
[drm:drm_vblank_get], enabling vblank on crtc 0, ret: -22
[drm:intel_crtc_mode_set], Mode for pipe A:
[drm:intel_pipe_set_base], No FB bound
[drm:intel_update_watermarks], plane A (pipe 0) clock: 31500
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 5
[drm:intel_calculate_wm], FIFO watermark level: 21
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 21, B: 29
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 21, B: 29, C: 2, SR 83
[drm] DAC-6: set mode 640x480 0
[drm:intel_update_watermarks], plane A (pipe 0) clock: 31500
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 5
[drm:intel_calculate_wm], FIFO watermark level: 21
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 21, B: 29
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 21, B: 29, C: 2, SR 83
[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
[drm:drm_helper_probe_single_connector_modes], LVDS-1
[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
[drm:drm_setup_crtcs], 
[drm:drm_enable_connectors], connector 5 enabled? no
[drm:drm_enable_connectors], connector 7 enabled? yes
[drm:drm_target_preferred], looking for preferred mode on connector 7
[drm:drm_target_preferred], found mode 800x480
[drm:drm_setup_crtcs], picking CRTCs for 4096x4096 config
[drm:drm_setup_crtcs], desired mode 800x480 set on crtc 4
[drm:intelfb_probe], 
[drm:intelfb_single_fb_probe], 
[drm:intelfb_single_fb_probe], creating new fb (console size 800x480, buffer size 800x480)
[drm:drm_agp_bind_pages], 
[drm:intelfb_create], allocated 800x480 fb: 0x007df000, bo df21d300
[drm:intelfb_set_par], 800 -1
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: df053800 4 fb: df1a9180 connectors: df053c60 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
[drm:drm_crtc_helper_set_config], modes are different, full mode set
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to df053800
[drm:drm_crtc_helper_set_config], attempting to set mode from userspace
[drm:intel_update_watermarks], plane B (pipe 1) clock: 32285
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 26
[drm:intel_calculate_wm], FIFO entries required for mode: 6
[drm:intel_calculate_wm], FIFO watermark level: 23
[drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 23
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 23, C: 2, SR 83
[drm:drm_vblank_get], enabling vblank on crtc 1, ret: -22
[drm:intel_crtc_mode_set], Mode for pipe B:
[drm:intel_pipe_set_base], Writing base 007DF000 00000000 0 0
[drm:intel_update_watermarks], plane B (pipe 1) clock: 32285
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 26
[drm:intel_calculate_wm], FIFO entries required for mode: 6
[drm:intel_calculate_wm], FIFO watermark level: 23
[drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 23
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 23, C: 2, SR 83
[drm] LVDS-8: set mode 800x480 c
[drm:intel_update_watermarks], plane B (pipe 1) clock: 32285
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 26
[drm:intel_calculate_wm], FIFO entries required for mode: 6
[drm:intel_calculate_wm], FIFO watermark level: 23
[drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 23
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 23, C: 2, SR 83
[drm:i915_handle_error] *ERROR* EIR stuck: 0x00000010, masking
[drm:intel_update_watermarks], plane B (pipe 1) clock: 32285
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:intel_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 26
[drm:intel_calculate_wm], FIFO entries required for mode: 6
[drm:intel_calculate_wm], FIFO watermark level: 23
[drm:i9xx_update_wm], FIFO watermarks - A: 26, B: 23
[drm:i9xx_update_wm], self-refresh entries: 12
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 26, B: 23, C: 2, SR 83
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: df053800 4 fb: df1a9180 connectors: df053c60 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to df053800
[drm] fb0: inteldrmfb frame buffer device
[drm:intelfb_single_fb_probe], registered panic notifier
[drm:intel_opregion_init], graphic opregion physical addr: 0x0
[drm:intel_opregion_init], ACPI OpRegion not supported!
[drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0
[drm:i915_error_work_func], generating error event
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: df053800 4 fb: df1a9180 connectors: df053c60 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to df053800

Hopefully the watermark details are sufficient, but let me know if there
is anything else you need from this system.
-ickle