[Intel-gfx] Patch to fix fdo bug #21064

[Zhenyu Wang]

On 2009.08.06 17:12:39 +0200, René Gabriëls wrote:
> The attached patch fixes my garbled screen issue on my Intel 855GM notebook. For
> some reason the VGA_2X_MODE bit in the VGACNTRL register is set to 1 on my
> machine, causing the video chip to scale up the framebuffer, which results in a
> funky screen.
> 
> In the patch I forced this bit to zero and the problem is gone.  I'm not sure if
> there's anybody who's actually using this 2X_MODE on an 855GM.  However, before
> this bug was introduced (git: db9f5915ce812144ffd9d2aa42e8ba856129c35e), this
> bit was forced to zero as well.
> 
> - René

> diff --git a/src/i830_display.c b/src/i830_display.c
> index 59ededc..d180b2b 100644
> --- a/src/i830_display.c
> +++ b/src/i830_display.c
> @@ -1096,6 +1096,10 @@ i830_disable_vga_plane (xf86CrtcPtr crtc)
>  
>      vgacntrl |= VGA_DISP_DISABLE;
>  
> +    /* disable "VGA/Pop-up 2X Centered Mode Scaling" on 855GM platform */
> +    if (IS_I855(pI830))
> +        vgacntrl &= ~VGA_2X_MODE;
> +    
>      OUTREG(VGACNTRL, vgacntrl);
>      i830WaitForVblank(pScrn);
>  

Looks we brought more problem with VGA mode disable than it has fixed...
and sr bit setting should only apply to affected chip, which is a G43 as we
originally saw this.

So how about following patch? Does it work for you? I would try to test this
on origin problematic G43 when I had hands no it, and current kms patch for this
on drm-intel-next needs rework too, and I'll test if sr bit affects on new chip
or not.

diff --git a/src/i830_display.c b/src/i830_display.c
index 59ededc..b749252 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1076,27 +1076,20 @@ i830_disable_vga_plane (xf86CrtcPtr crtc)
 {
     ScrnInfoPtr pScrn = crtc->scrn;
     I830Ptr pI830 = I830PTR(pScrn);
-    uint32_t vgacntrl = INREG(VGACNTRL);
     uint8_t sr01;
 
-    if (vgacntrl & VGA_DISP_DISABLE)
-	return;
-
     /*
        Set bit 5 of SR01;
        Wait 30us;
        */
-    OUTREG8(SRX, 1);
-    sr01 = INREG8(SRX + 1);
-    OUTREG8(SRX + 1, sr01 | (1 << 5));
-    usleep(30);
-    /* disable center mode on 965GM and G4X platform */
-    if (IS_I965GM(pI830) || IS_G4X(pI830))
-        vgacntrl &= ~(3 << 24);
-
-    vgacntrl |= VGA_DISP_DISABLE;
+    if (IS_G4X(pI830)) {
+	OUTREG8(SRX, 1);
+	sr01 = INREG8(SRX + 1);
+	OUTREG8(SRX + 1, sr01 | (1 << 5));
+	usleep(30);
+    }
 
-    OUTREG(VGACNTRL, vgacntrl);
+    OUTREG(VGACNTRL, VGA_DISP_DISABLE);
     i830WaitForVblank(pScrn);
 
 }
-- 
Open Source Technology Center, Intel ltd.

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