[Intel-gfx] [PATCH 6/8] drm/i915: Rework hardware reset procedure

[Ben Gamari]

Mimick what oga does in the BSD driver
---
 drivers/gpu/drm/i915/i915_drv.c |   18 +++++++++++++-----
 1 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a88efb5..576cb7e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -181,20 +181,28 @@ void i965_reset(struct drm_device *dev, u8 flags)
 
 	if (IS_I965G(dev) || IS_G4X(dev)) {
 		/*
-		 * Set the domains we want to reset, then the reset bit (bit 0), 
-		 * and finally wait for hardware to clear it.
+		 * Set the domains we want to reset, then the reset bit (bit 0).
+		 * Clear the reset bit after a while and wait for hardware status
+		 * bit (bit 1) to be set
 		 */
 		pci_read_config_byte(dev->pdev, GDRST, &gdrst);
-		pci_write_config_byte(dev->pdev, GDRST, gdrst | flags);
+		//TODO: Set domains
+		pci_write_config_byte(dev->pdev, GDRST, gdrst | 1);
 		udelay(50);
-		pci_write_config_byte(dev->pdev, GDRST, gdrst & 0x1);
+		pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfeffffff);
 
 		/* ...we don't want to loop forever though, 500ms should be plenty */
 	       timeout = jiffies + msecs_to_jiffies(500);
 		do {
 			udelay(100);
 			pci_read_config_byte(dev->pdev, GDRST, &gdrst);
-		} while ((gdrst & 0x1) && time_after(timeout, jiffies));
+		} while ((gdrst & 2) && time_after(timeout, jiffies));
+
+		if (gdrst & 0x1) {
+			DRM_ERROR("Failed to reset chip. You're screwed.");
+			mutex_unlock(&dev->struct_mutex);
+			return;
+		}
 	} else {
 		DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
 		return;
-- 
1.6.3.3