[Intel-gfx] [PATCH] drm/i915: select the appropriate pipe for LVDS

yakui.zhao at intel.com yakui.zhao at intel.com
Fri Dec 4 14:48:24 CET 2009


From: Zhao Yakui <yakui.zhao at intel.com>

On the pre-965 platform the integrated LVDS only can use the pipe B.
And from the 965 platform we can also use the pipe A for integrated LVDS.
If the BIOS selects the pipe A for integrated LVDS, we can keep the pipe
programmed by BIOS for LVDS. Otherwise when external monitor is also
connected, maybe we can't set the incorrect display mode for the external
monitor in the boot phase.

So we can keep the pipe programmed by BIOS for LVDS on the 965gm/g4x/
ironlake platform.

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |    6 ++++++
 drivers/gpu/drm/i915/intel_display.c |    5 ++++-
 drivers/gpu/drm/i915/intel_lvds.c    |   17 +++++++++++++++++
 3 files changed, 27 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ca1ba42..3193498 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -283,6 +283,12 @@ typedef struct drm_i915_private {
 
 	/* Register state */
 	bool modeset_on_lid;
+	/*
+	 * record the pipe used by LVDS.
+	 * 0 means the pipe A.
+	 * 1 means the PIPE B
+	 */
+	int lvds_pipe;
 	u8 saveLBB;
 	u32 saveDSPACNTR;
 	u32 saveDSPBCNTR;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 65b76ff..5eda183 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3183,7 +3183,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 			lvds_reg = PCH_LVDS;
 
 		lvds = I915_READ(lvds_reg);
-		lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
+		lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
+		/* select the correct pipe for LVDS */
+		if (dev_priv->lvds_pipe)
+			lvds |= LVDS_PIPEB_SELECT;
 		/* set the corresponsding LVDS_BORDER bit */
 		lvds |= dev_priv->lvds_border_bits;
 		/* Set the B0-B3 data pairs corresponding to whether we're going to
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 02b813e..5103167 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -1069,6 +1069,23 @@ void intel_lvds_init(struct drm_device *dev)
 
 	intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 	intel_output->crtc_mask = (1 << 1);
+	/*
+	 * By default we will use the pipe B for LVDS. But we can also use
+	 * pipe A for integrated LVDS on the 965/g4x/Ironlake platform.
+	 * If the BIOS select the pipe A for LVDS, we can also use pipe A
+	 * for LVDS. In such case we will change the crtc mask for LVDS.
+	 */
+	dev_priv->lvds_pipe = 1;
+	if (IS_I965G(dev)) {
+		if (IS_IGDNG(dev))
+			lvds = I915_READ(PCH_LVDS);
+		else
+			lvds = I915_READ(LVDS);
+		if ((lvds & LVDS_PORT_EN) && !(lvds & LVDS_PIPEB_SELECT)) {
+			dev_priv->lvds_pipe = 0;
+			intel_output->crtc_mask = (1 << 0);
+		}
+	}
 	drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
-- 
1.5.4.5




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