[Intel-gfx] [PATCH] drm/i915: Add WATCH_FENCE

[Chris Wilson]

Add a few printk()s to aide debugging fence management and iterate over
the fences and known buffers to check that the registers are consistent.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h       |    7 +++++
 drivers/gpu/drm/i915/i915_gem.c       |   22 +++++++++++++++
 drivers/gpu/drm/i915/i915_gem_debug.c |   46 +++++++++++++++++++++++++++++++++
 3 files changed, 75 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7325363..b9253bd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -71,6 +71,7 @@ enum pipe {
 #define WATCH_RELOC	0
 #define WATCH_INACTIVE	0
 #define WATCH_PWRITE	0
+#define WATCH_FENCE	0
 
 #define I915_GEM_PHYS_CURSOR_0 1
 #define I915_GEM_PHYS_CURSOR_1 2
@@ -636,6 +637,12 @@ void i915_verify_inactive(struct drm_device *dev, char *file, int line);
 #else
 #define i915_verify_inactive(dev, file, line)
 #endif
+#if WATCH_FENCE
+void
+i915_verify_fence(struct drm_device *dev, char *file, int line);
+#else
+#define i915_verify_fence(dev, file, line)
+#endif
 void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle);
 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
 			  const char *where, uint32_t mark);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9fbfaab..8249c17 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1564,6 +1564,8 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj, bool write)
 		break;
 	}
 
+	i915_verify_fence (dev, __FILE__, __LINE__);
+
 	/* First try to find a free reg */
 	for (i = dev_priv->fence_reg_start; i < dev_priv->num_fence_regs; i++) {
 		reg = &dev_priv->fence_regs[i];
@@ -1591,6 +1593,10 @@ try_again:
 		 * objects to finish before trying again.
 		 */
 		if (i == dev_priv->num_fence_regs) {
+#if WATCH_FENCE
+			DRM_INFO("%s: waiting for fence (waiting on %p)\n",
+				 __func__, reg->obj);
+#endif
 			ret = i915_gem_object_set_to_gtt_domain(reg->obj, 0);
 			if (ret) {
 				WARN(ret != -ERESTARTSYS,
@@ -1614,6 +1620,13 @@ try_again:
 	obj_priv->fence_reg = i;
 	reg->obj = obj;
 
+#if WATCH_FENCE
+	DRM_INFO("%s: allocating fence %d for %p, %08x + %08x\n",
+		 __func__,
+		 obj_priv->fence_reg, obj,
+		 obj_priv->gtt_offset, obj->size);
+#endif
+
 	if (IS_I965G(dev))
 		i965_write_fence_reg(reg);
 	else if (IS_I9XX(dev))
@@ -1621,6 +1634,8 @@ try_again:
 	else
 		i830_write_fence_reg(reg);
 
+	i915_verify_fence (dev, __FILE__, __LINE__);
+
 	return 0;
 }
 
@@ -1638,6 +1653,13 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj)
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 
+#if WATCH_FENCE
+	DRM_INFO("%s: clearing fence %d for %p, %08x + %08x\n",
+		 __func__,
+		 obj_priv->fence_reg, obj,
+		 obj_priv->gtt_offset, obj->size);
+#endif
+
 	if (IS_I965G(dev))
 		I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0);
 	else
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index 21e9565..c7ee64f 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -51,6 +51,52 @@ i915_verify_inactive(struct drm_device *dev, char *file, int line)
 }
 #endif /* WATCH_INACTIVE */
 
+#if WATCH_FENCE
+void
+i915_verify_fence(struct drm_device *dev, char *file, int line)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj_priv;
+	struct drm_i915_fence_reg *reg = NULL;
+	int i;
+
+	/* First check that all fences point to themselves */
+	for (i = dev_priv->fence_reg_start; i < dev_priv->num_fence_regs; i++) {
+		reg = &dev_priv->fence_regs[i];
+		if (!reg->obj)
+			continue;
+
+		obj_priv = reg->obj->driver_private;
+		if (obj_priv->fence_reg != i) {
+			DRM_ERROR("invalid fence %d, object, %p %s:%d\n",
+				  i, obj_priv->obj, file, line);
+		}
+	}
+
+	/* Then check the fences on known objects */
+	list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
+		if (obj_priv->fence_reg != I915_FENCE_REG_NONE &&
+		    dev_priv->fence_regs[obj_priv->fence_reg].obj != obj_priv->obj) {
+			DRM_ERROR("invalid active object %p, fence %d, %s:%d\n",
+				  obj_priv->obj, obj_priv->fence_reg, file, line);
+		}
+	}
+	list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, list) {
+		if (obj_priv->fence_reg != I915_FENCE_REG_NONE &&
+		    dev_priv->fence_regs[obj_priv->fence_reg].obj != obj_priv->obj) {
+			DRM_ERROR("invalid flushing object %p, fence %d, %s:%d\n",
+				  obj_priv->obj, obj_priv->fence_reg, file, line);
+		}
+	}
+	list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, list) {
+		if (obj_priv->fence_reg != I915_FENCE_REG_NONE &&
+		    dev_priv->fence_regs[obj_priv->fence_reg].obj != obj_priv->obj) {
+			DRM_ERROR("invalid inactive object %p, fence %d, %s:%d\n",
+				  obj_priv->obj, obj_priv->fence_reg, file, line);
+		}
+	}
+}
+#endif
 
 #if WATCH_BUF | WATCH_EXEC | WATCH_PWRITE
 static void
-- 
1.6.0.4