[Intel-gfx] [PATCH] xvmc: fix broken xvmc on 965
Xiang, Haihao
haihao.xiang at intel.com
Thu Feb 19 08:40:13 CET 2009
---
src/i830_video.c | 35 ++++++++++++++++++++++++-----------
src/i965_video.c | 14 +++++++++-----
2 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/src/i830_video.c b/src/i830_video.c
index be2d28e..3140f70 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2383,18 +2383,31 @@ I830PutImage(ScrnInfoPtr pScrn,
pPriv->buf = NULL;
}
- if (pPriv->buf == NULL) {
- pPriv->buf = drm_intel_bo_alloc(pI830->bufmgr,
- "xv buffer", alloc_size, 4096);
- if (pPriv->buf == NULL)
- return BadAlloc;
- if (!pPriv->textured && drm_intel_bo_pin(pPriv->buf, 4096) != 0) {
- drm_intel_bo_unreference(pPriv->buf);
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Failed to pin xv buffer\n");
- return BadAlloc;
- }
+#ifdef INTEL_XVMC
+ if (id == FOURCC_XVMC &&
+ pPriv->rotation == RR_Rotate_0) {
+ if (pPriv->buf) {
+ assert(pPriv->textured);
+ drm_intel_bo_unreference(pPriv->buf);
+ pPriv->buf = NULL;
+ }
+ } else {
+#endif
+ if (pPriv->buf == NULL) {
+ pPriv->buf = drm_intel_bo_alloc(pI830->bufmgr,
+ "xv buffer", alloc_size, 4096);
+ if (pPriv->buf == NULL)
+ return BadAlloc;
+ if (!pPriv->textured && drm_intel_bo_pin(pPriv->buf, 4096) != 0) {
+ drm_intel_bo_unreference(pPriv->buf);
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Failed to pin xv buffer\n");
+ return BadAlloc;
+ }
+ }
+#ifdef INTEL_XVMC
}
+#endif
/* fixup pointers */
#ifdef INTEL_XVMC
diff --git a/src/i965_video.c b/src/i965_video.c
index 72a55d6..0fc9c42 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -431,11 +431,15 @@ i965_create_src_surface_state(ScrnInfoPtr scrn,
src_surf_state->ss2.render_target_rotation = 0;
src_surf_state->ss3.pitch = src_pitch - 1;
- src_surf_state->ss1.base_addr =
- intel_emit_reloc(surface_bo,
- offsetof(struct brw_surface_state, ss1),
- src_bo, src_offset,
- I915_GEM_DOMAIN_SAMPLER, 0);
+ if (src_bo) {
+ src_surf_state->ss1.base_addr =
+ intel_emit_reloc(surface_bo,
+ offsetof(struct brw_surface_state, ss1),
+ src_bo, src_offset,
+ I915_GEM_DOMAIN_SAMPLER, 0);
+ } else {
+ src_surf_state->ss1.base_addr = src_offset;
+ }
drm_intel_bo_unmap(surface_bo);
return surface_bo;
--
1.5.6.3
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