[Intel-gfx] [PATCH 2/9] drm/i915: Add pci ids for new chipsets
Eric Anholt
eric at anholt.net
Fri Jun 5 13:16:45 CEST 2009
On Fri, 2009-06-05 at 15:38 +0800, Zhenyu Wang wrote:
> Add PCI ids for new desktop and mobile chipsets,
> also include them under some chipset feature markers.
The "start probing the DRM on this chipset" hunk should be the last
commit in the series -- otherwise, someone bisecting some other problem
on this chipset can hit a bad point where a completely broken DRM gets
loaded.
> Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 18 +++++++++++++-----
> include/drm/drm_pciids.h | 2 ++
> 2 files changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c431fa5..96f5279 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -785,7 +785,9 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
> (dev)->pci_device == 0x2E02 || \
> (dev)->pci_device == 0x2E12 || \
> (dev)->pci_device == 0x2E22 || \
> - (dev)->pci_device == 0x2E32)
> + (dev)->pci_device == 0x2E32 || \
> + (dev)->pci_device == 0x0042 || \
> + (dev)->pci_device == 0x0046)
>
> #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
> (dev)->pci_device == 0x2A12)
> @@ -807,20 +809,26 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
> (dev)->pci_device == 0x29D2 || \
> (IS_IGD(dev)))
>
> +#define IS_IGDNG_D(dev) ((dev)->pci_device == 0x0042)
> +#define IS_IGDNG_M(dev) ((dev)->pci_device == 0x0046)
> +#define IS_IGDNG(dev) (IS_IGDNG_D(dev) || IS_IGDNG_M(dev))
> +
> #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
> - IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
> + IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
> + IS_IGDNG(dev))
>
> #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
> IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
> - IS_IGD(dev))
> + IS_IGD(dev) || IS_IGDNG_M(dev))
>
> -#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
> +#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
> + IS_IGDNG(dev))
> /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
> * rows, which changed the alignment requirements and fence programming.
> */
> #define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
> IS_I915GM(dev)))
> -#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev))
> +#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
> #define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
>
> #define PRIMARY_RINGBUFFER_SIZE (128*1024)
> diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
> index fc55db7..8b4c80c 100644
> --- a/include/drm/drm_pciids.h
> +++ b/include/drm/drm_pciids.h
> @@ -536,4 +536,6 @@
> {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
> {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
> {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
> + {0x8086, 0x0042, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
> + {0x8086, 0x0046, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
> {0, 0, 0}
--
Eric Anholt
eric at anholt.net eric.anholt at intel.com
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