[Intel-gfx] [PATCH 2/2]drm/i915: Use?best PLL timing values for G4X chipsets
Fu Michael
michael_fu at linux.intel.com
Thu Mar 12 03:20:33 CET 2009
Zhenyu Wang wrote:
> On 2009.03.10 21:00:25 +0800, Ma Ling wrote:
>
>> +
>> + memset (best_clock, 0, sizeof (*best_clock));
>> + max_n = limit->n.max;
>> + /* based on hardware requriment prefer smaller n to precision */
>> + for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
>> + /* based on hardware requirment prefere larger m1,m2, p1 */
>> + for (clock.m1 = limit->m1.max;
>> + clock.m1 >= limit->m1.min; clock.m1--) {
>> + for (clock.m2 = limit->m2.max;
>> + clock.m2 >= limit->m2.min; clock.m2--) {
>> + for (clock.p1 = limit->p1.max;
>> + clock.p1 >= limit->p1.min; clock.p1--) {
>> + int this_err;
>> +
>> + intel_clock (refclk, &clock);
>> + if (!intel_PLL_is_valid(crtc, &clock))
>> + continue;
>> + this_err = abs(clock.dot - target) ;
>> + if (this_err < err_most) {
>> + *best_clock = clock;
>> + err_most = this_err;
>> + /*chose smaller n*/
>> + max_n = clock.n;
>> + found = true;
>>
>
> If we should prefer larger m1,m2,p1, why not exit the cycle here and return?
> Here we still try to look for the smallest error for target but might not be preferred
> largest m1,m2,p1?
>
precision override m1,m2,p1 ( if a smaller m1,m2,p1 can get even better
precision, we go with smaller combination )
N override precision ( if a bigger N can get even better precision in
the math, we still go with smaller N )
> And is it possible if no clock can be found that meets the error precision of target?
> Should we guard for that case?
>
> And how about your test result on g4x with KMS?
>
>
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