[Intel-gfx] [PATCH] i830: use GTT maps for fallbacks & fence setup

[Jesse Barnes]

On Thu, 26 Mar 2009 18:34:01 -0700
Jesse Barnes <jbarnes at virtuousgeek.org> wrote:

> On Thu, 26 Mar 2009 18:21:57 -0700
> Eric Anholt <eric at anholt.net> wrote:
> > If something actually dereferences that pointer, it's not going to
> > get the sort of results it's hoping for.  What happens if we set it
> > to NULL, anyone know?  EXA/UXA should be cool with that, I think.
> 
> Yeah if it's NULL it should be ok...  So really we only have to worry
> about noaccel and XAA here (arg too many damned configurations).
> Neither of those will set kernel_exec_fencing right?  So they'll
> always have fence regs set up and the memory mapped, so we can just
> use FbBase
> + fbOffset in those cases, will fix.

Well not quite.  Our EXA isn't set up to do prepare/finish so we need
to handle that case too.  Fixed & tested though.

> I tried testing non-GEM UXA and it failed, but somewhere else I think.
> I'll try to fix anyway and re-post.

I think I fixed this case, but UXA is still broken for non-GEM, in what
looks like an unrelated way (hangs in drm_intel_bufmgr_fake_wait_idle
at startup).

-- 
Jesse Barnes, Intel Open Source Technology Center

diff --git a/src/i830_driver.c b/src/i830_driver.c
index 7502d30..d7ee615 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -823,22 +823,40 @@ i830_update_front_offset(ScrnInfoPtr pScrn)
    ScreenPtr pScreen = pScrn->pScreen;
    I830Ptr pI830 = I830PTR(pScrn);
    int pitch = pScrn->displayWidth * pI830->cpp;
+   pointer data = NULL;
 
    /* Update buffer locations, which may have changed as a result of
     * i830_bind_all_memory().
     */
    pScrn->fbOffset = pI830->front_buffer->offset;
 
+   if (pI830->starting || pI830->accel == ACCEL_UXA)
+       return;
+
    /* If we are still in ScreenInit, there is no screen pixmap to be updated
     * yet.  We'll fix it up at CreateScreenResources.
     */
-   if (!pI830->starting && pI830->accel != ACCEL_UXA) {
-      if (!pScreen->ModifyPixmapHeader(pScreen->GetScreenPixmap(pScreen),
+   if (!pI830->memory_manager) {
+       data = pI830->FbBase + pScrn->fbOffset; /* default to legacy */
+   } else {
+      dri_bo *bo = pI830->front_buffer->bo;
+
+      if (bo) {
+	  if (pI830->kernel_exec_fencing) {
+	      if (drm_intel_gem_bo_map_gtt(bo))
+		  xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s: bo map failed\n",
+			     __FUNCTION__);
+	  } else {
+	      /* Will already be pinned by bind_all_memory in this case */
+	      drm_intel_gem_bo_start_gtt_access(bo, 1);
+	  }
+	  data = bo->virtual;
+      }
+   }
+   if (!pScreen->ModifyPixmapHeader(pScreen->GetScreenPixmap(pScreen),
 				       pScrn->virtualX, pScrn->virtualY, -1, -1,
-				       pitch, (pointer)(pI830->FbBase +
-							pScrn->fbOffset)))
+				       pitch, data))
        FatalError("Couldn't adjust screen pixmap\n");
-   }
 }
 
 /**
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 0a22486..fc4e66c 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -37,6 +37,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "i810_reg.h"
 #include "i915_drm.h"
 #include <string.h>
+#include <sys/mman.h>
 
 #define ALWAYS_SYNC		0
 #define ALWAYS_FLUSH		0
@@ -837,8 +838,6 @@ i830_uxa_set_pixmap_bo (PixmapPtr pixmap, dri_bo *bo)
 static Bool
 i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
     dri_bo *bo = i830_get_pixmap_bo (pixmap);
 
     if (bo) {
@@ -853,16 +852,27 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
 	    i830->need_sync = FALSE;
 	}
 
-	if (pScrn->vtSema && !pI830->use_drm_mode && pI830->memory_manager) {
-	    if (drm_intel_bo_pin(bo, 4096) != 0)
-		return FALSE;
-	    drm_intel_gem_bo_start_gtt_access(bo, access == UXA_ACCESS_RW);
-	    pixmap->devPrivate.ptr = pI830->FbBase + bo->offset;
-	} else {
+	/* No VT sema or GEM?  No GTT mapping. */
+	if (!scrn->vtSema || !i830->memory_manager) {
 	    if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0)
 		return FALSE;
 	    pixmap->devPrivate.ptr = bo->virtual;
+	    return TRUE;
+	}
+
+	/* Kernel manages fences at GTT map/fault time */
+	if (i830->kernel_exec_fencing) {
+	    if (drm_intel_gem_bo_map_gtt(bo)) {
+		xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s: bo map failed\n",
+			   __FUNCTION__);
+		return FALSE;
+	    }
+	} else { /* or not... */
+	    if (drm_intel_bo_pin(bo, 4096) != 0)
+		return FALSE;
+	    drm_intel_gem_bo_start_gtt_access(bo, access == UXA_ACCESS_RW);
 	}
+	pixmap->devPrivate.ptr = bo->virtual;
     }
     return TRUE;
 }
@@ -870,8 +880,6 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
 static void
 i830_uxa_finish_access (PixmapPtr pixmap)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
     dri_bo *bo = i830_get_pixmap_bo (pixmap);
 
     if (bo) {
@@ -879,14 +887,20 @@ i830_uxa_finish_access (PixmapPtr pixmap)
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	I830Ptr i830 = I830PTR(scrn);
 
-	if (pScrn->vtSema && !pI830->use_drm_mode && pI830->memory_manager)
-	    drm_intel_bo_unpin(bo);
-	else
+	if (bo == i830->front_buffer->bo)
+	    i830->need_flush = TRUE;
+
+	if (!scrn->vtSema || !i830->memory_manager) {
 	    dri_bo_unmap(bo);
+	    pixmap->devPrivate.ptr = NULL;
+	    return;
+	}
 
+	if (i830->kernel_exec_fencing)
+	    drm_intel_gem_bo_unmap_gtt(bo);
+	else
+	    drm_intel_bo_unpin(bo);
 	pixmap->devPrivate.ptr = NULL;
-	if (bo == i830->front_buffer->bo)
-	    i830->need_flush = TRUE;
     }
 }