[Intel-gfx] [PATCH] drm/i915: let pin routine figure out appropriate alignment

[Jesse Barnes]

From 8adb52b4529e777d4df0356bc2c8ef5453c2322e Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes at jbarnes-desktop.localdomain>
Date: Wed, 18 Nov 2009 09:56:25 -0800
Subject: [PATCH] drm/i915: let pin routine figure out appropriate alignment

When this code got moved out of intel_pipe_set_base, it grew a forced
alignment of 256k, which wasn't always correct.  Remove that and let the
pin routine figure out the correct alignment for the object (it should
do this in just about every case).

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |   20 +-------------------
 1 files changed, 1 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c7d5611..b4c6b40 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1193,27 +1193,9 @@ static int
 intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
 {
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
-	u32 alignment;
 	int ret;
 
-	switch (obj_priv->tiling_mode) {
-	case I915_TILING_NONE:
-		alignment = 64 * 1024;
-		break;
-	case I915_TILING_X:
-		/* pin() will align the object as required by fence */
-		alignment = 0;
-		break;
-	case I915_TILING_Y:
-		/* FIXME: Is this true? */
-		DRM_ERROR("Y tiled not allowed for scan out buffers\n");
-		return -EINVAL;
-	default:
-		BUG();
-	}
-
-	alignment = 256 * 1024;
-	ret = i915_gem_object_pin(obj, alignment);
+	ret = i915_gem_object_pin(obj, 0);
 	if (ret != 0)
 		return ret;
 
-- 
1.6.1.3