[Intel-gfx] [Patch] DRM/I915: Don't set the DPLL_MD multipler for LVDS output

[ykzhao]

On Sat, 2009-09-05 at 03:52 +0800, Eric Anholt wrote:
> On Mon, 2009-08-31 at 14:13 +0800, yakui.zhao at intel.com wrote:
> > From: Zhao Yakui <yakui.zhao at intel.com>
> > 
> > When the output device is LVDS, maybe the pixel clock of adjusted_mode will be 
> > less than that in mode. In such case it will set the incorrect multipler factor
> > in DPLL_MD register.
> > So it is unnecessary to set dpll_md_reg when the output type is LVDS.
> 
> This seems wrong.  Now you leave whatever junk is currently in the
> register there?
> 
> Seems like the right answer is:
> if (IS_THING_WITH_DPLL_MD && is_sdvo) {
> 	I915_WRITE(dpll_md_reg, sdvo_pixel_multiply)
> } else {
> 	I915_WRITE(dpll_md_reg, 0); // whatever means "multiply by one"
> }
> 
It is also right after this is limited to SDVO device.
When the output type is SDVO, we should set the correct DPLL multiplier.
In fact this is also applicable to  CRT/HDMI type. But as the pixel
clock of adjusted_mode is identical to that in mode for the CRT/HDMI, it
is unnecessary to set or it is set to zero.

Of course it is also ok if we limit it to the SDVO output device.

Thanks. 

> Also makes the change clear, because looking at it I figured you were
> trying to solve an SDVO LVDS problem.
>