[Intel-gfx] [PATCH] drm/i915: execbuf2 support

[Jesse Barnes]

On Tue, 15 Sep 2009 23:11:59 +0100
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> Excerpts from Jesse Barnes's message of Tue Sep 15 19:02:05 +0100
> 2009:
> > +    /*
> > +     * Pre-965 chips need a fence register set up in order to
> > +     * properly handle blits to/from tiled surfaces.
> > +     */
> > +    if (need_fence && obj_priv->fence_reg == I915_FENCE_REG_NONE &&
> > +        obj_priv->tiling_mode != I915_TILING_NONE) {
> > +        ret = i915_gem_object_get_fence_reg(obj);
> > +        if (ret != 0) {
> > +            if (ret != -EBUSY && ret != -ERESTARTSYS)
> > +                DRM_ERROR("Failure to install fence: %d\n",
> > +                      ret);
> > +            i915_gem_object_unpin(obj);
> > +            return ret;
> > +        }
> > +    } else if (!need_fence && obj_priv->fence_reg !=
> > I915_FENCE_REG_NONE) {
> > +        i915_gem_clear_fence_reg(obj);
> > +    }
> 
> I think this is broken. If a tiled object is being accessed via a
> fence and through surface walking in the same batch buffer, then we
> have just revoked a required register. Besides, we can be lazy here
> and simply reassign the fence register when required.

Ah I knew I was missing something here...  I'll drop the fence clear.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center