[Intel-gfx] GEM memory horror is back :/

[Chris Wilson]

On Sun, 11 Apr 2010 17:54:16 +1000, Dave Airlie <airlied at gmail.com> wrote:
> I've wondered before, back when I worked on a TTM driver as well, whether
> the 1MB needed backing pages allocated to it, or if you just needed a 1MB
> space in the GTT.

True. It's a combination of an alignment constraint on both the origin of
the surface and the pitch, and ensuring that sufficient pages are
allocated to fulfil tiled access of the last pixel. Being able to have an
independent num-of-pages and fenced size would be useful... Except that
the userspace allocator rounds sizes up to the next power of two.

The simplest method would seem to be another ioctl to set the 'realized'
size of bo, or perhaps to supply width and height. Size would seem to be
the most explicit.
-ickle

-- 
Chris Wilson, Intel Open Source Technology Centre