[Intel-gfx] [PATCH 2/4] drm/i915: Push an fbc disable across suspend
Adam Jackson
ajax at redhat.com
Fri Apr 23 17:17:40 CEST 2010
Restore it on the way back up if we disabled it on the way down.
Signed-off-by: Adam Jackson <ajax at redhat.com>
---
drivers/gpu/drm/i915/i915_drv.c | 13 +++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_suspend.c | 2 --
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 01e91ea..412bade 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -233,6 +233,9 @@ static int i915_drm_freeze(struct drm_device *dev)
drm_irq_uninstall(dev);
}
+ dev_priv->fbc_disabled_for_suspend = intel_fbc_enabled(dev);
+ intel_disable_fbc(dev);
+
i915_save_state(dev);
intel_opregion_free(dev, 1);
@@ -276,6 +279,16 @@ static int i915_drm_thaw(struct drm_device *dev)
i915_restore_state(dev);
+ if (dev_priv->fbc_disabled_for_suspend) {
+ struct drm_crtc *crtc;
+
+ /* XXX might not be the plane we compressed at suspend; meh */
+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+ intel_enable_fbc(crtc, 500);
+
+ dev_priv->fbc_disabled_for_suspend = false;
+ }
+
intel_opregion_init(dev, 1);
/* KMS EnterVT equivalent */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3a19cb4..e9e8c4a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -341,6 +341,7 @@ typedef struct drm_i915_private {
/* Register state */
bool modeset_on_lid;
+ bool fbc_disabled_for_suspend;
u8 saveLBB;
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 60a5800..81cdfb4 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -707,10 +707,8 @@ void i915_restore_display(struct drm_device *dev)
/* only restore FBC info on the platform that supports FBC*/
if (I915_HAS_FBC(dev)) {
if (IS_GM45(dev)) {
- g4x_disable_fbc(dev);
I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
} else {
- i8xx_disable_fbc(dev);
I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
--
1.7.0.1
More information about the Intel-gfx
mailing list