[Intel-gfx] 8-bit vs. 10-bit palette mode, and LVDS dithering
Peter Clifton
pcjc2 at cam.ac.uk
Tue Apr 27 00:22:38 CEST 2010
On Mon, 2010-04-26 at 10:29 -0400, Adam Jackson wrote:
> On Sat, 2010-04-24 at 17:25 +0100, Peter Clifton wrote:
>
> > I noticed an anomaly in the register settings on my GM45, according to
> > PIPEBCONF, it is set in 10-bit palette mode, yet the KMS code programs
> > the palette registers as if it is in 8-bit mode, and doesn't touch the
> > PIPEBGCMAX{RED,GREEN,BLUE} entries for the final interpolation step.
> >
> > I've played with it, and I "think" my screen looks nicer with the
> > palette reset to 8-bit mode. The KMS driver never touches this register
> > normally, and I think it should reset it in intel_display.c's
> > intel_crtc_load_lut.
>
> You are almost certainly correct, we should be forcing 8-bit gamma mode.
> We're loading the palette as though we are, it's very unlikely to look
> right if programmed for 10-bit.
>
> > Ideally, it would be nice to have a higher resolution gamma correction.
> > Will it work if I drm_mode_crtc_set_gamma_size(&intel_crtc->base, 129);
> > and feed that into the 10-bit linear-interpolated lookup table?
Comments on the following patch series (please don't apply as is!)
> There's a 256-stop assumption hardcoded in a bunch of places, and you
> want to be compatible with whatever ramp size userspace passes down.
> But, once you fix that, yes, 10-bit linear gamma should work regardless
> of the actual pixel depth.
If we start asking for a 129 entry LUT, the Xorg stack needs to be fixed
not to try and shove it a 256 entry table. There will be of course,
versions which still do that - and ideally the palette would still work
for those - either by fall-back to 8-bit mode, or by fudging a 10-bit
table from the passed data.
By patch 2 in the following series, this works by picking every other
entry out of the 256 entry table, and then accept the discontinuity by
taking the 256th entry in the passed LUT for the 129th register set.
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
More information about the Intel-gfx
mailing list