[Intel-gfx] [PATCH 06/20] drm/i915: Maintain LRU order of inactive objects upon access by CPU

[Daniel Vetter]

On Sat, Aug 07, 2010 at 11:01:25AM +0100, Chris Wilson wrote:
> In order to reduce the penalty of fallbacks under memory pressure and to
> avoid a potential immediate ping-pong of evicting a mmaped buffer, we
> move the object to the tail of the inactive list when a page is freshly
> faulted or the object is moved into the CPU domain.
> 
> We choose not to protect the CPU objects from casual eviction,
> preferring to keep the GPU active for as long as possible.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

This patch is broken - you're missing an && !obj_priv->pin_count in both
if-clauses. Think frontbuffer rendering - that's at least how I've tracked
it down.

-Daniel
-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48