[Intel-gfx] [PATCH 02/13] drm/i915: allow lazy emitting of requests
Daniel Vetter
daniel.vetter at ffwll.ch
Thu Feb 4 22:05:02 CET 2010
Sometimes (like when flushing in preparation of batchbuffer execution)
we know that we'll emit a request but haven't yet done so. Allow this
case by simply taking the next seqno by default. Ensure that a request
is eventually emitted before waiting for an object by BUG'ing in
i915_gem_object_wait_rendering.
Also replace one open-coded version of i915_gem_object_wait_rendering,
to prevent future code-diversion.
This will be used for pipelined fencing, for otherwise we'd need to emit
up to num_fences_used additional request per execbuf ioctl.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
drivers/gpu/drm/i915/i915_gem.c | 19 +++++++++----------
1 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bb3c491..3c0bf2c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1517,6 +1517,9 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno)
drm_gem_object_reference(obj);
obj_priv->active = 1;
}
+ /* Take the seqno of the next request if none is given */
+ if (seqno == 0)
+ seqno = dev_priv->mm.next_gem_seqno;
/* Move from whatever list we were on to the tail of execution. */
spin_lock(&dev_priv->mm.active_list_lock);
list_move_tail(&obj_priv->list,
@@ -1992,6 +1995,7 @@ static int
i915_gem_object_wait_rendering(struct drm_gem_object *obj)
{
struct drm_device *dev = obj->dev;
+ drm_i915_private_t *dev_priv = dev->dev_private;
struct drm_i915_gem_object *obj_priv = obj->driver_private;
int ret;
@@ -2004,6 +2008,8 @@ i915_gem_object_wait_rendering(struct drm_gem_object *obj)
* it.
*/
if (obj_priv->active) {
+ BUG_ON(obj_priv->last_rendering_seqno
+ == dev_priv->mm.next_gem_seqno);
#if WATCH_BUF
DRM_INFO("%s: object %p wait for seqno %08x\n",
__func__, obj, obj_priv->last_rendering_seqno);
@@ -2895,17 +2901,10 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj)
return -EINVAL;
i915_gem_object_flush_gpu_write_domain(obj);
-
/* Wait on any GPU rendering and flushing to occur. */
- if (obj_priv->active) {
-#if WATCH_BUF
- DRM_INFO("%s: object %p wait for seqno %08x\n",
- __func__, obj, obj_priv->last_rendering_seqno);
-#endif
- ret = i915_do_wait_request(dev, obj_priv->last_rendering_seqno, 0);
- if (ret != 0)
- return ret;
- }
+ ret = i915_gem_object_wait_rendering(obj);
+ if (ret != 0)
+ return ret;
old_write_domain = obj->write_domain;
old_read_domains = obj->read_domains;
--
1.6.6.1
More information about the Intel-gfx
mailing list