[Intel-gfx] [RFT] drm/i915: enable/disable LVDS port at DPMS time
ykzhao
yakui.zhao at intel.com
Fri Feb 12 02:26:28 CET 2010
On Fri, 2010-02-12 at 04:41 +0800, Jesse Barnes wrote:
> It would be good to disable the LVDS port when we shut down the panel
> to save power. We haven't done so until now because we had trouble
> getting the right LVDS parameters from the BIOS. I think we're past
> that now, so enabling and disabling the port should be safe, though it
> would probably be made cleaner with some additional changes to the
> display code, where we also bang on the LVDS reg to set the pairing
> correctly etc.
>
> Seems to save a bit of power (up to 300mW in my basic wattsup
> meter testing).
Hi, Jesse
Do you test it on the laptop based on Ironlake or crestline/cantiga
platform?
On the ironlake the LVDS_PORT_EN bit will be enabled/disabled in
course of CRTC DPMS.
>From the spec this bit must be set before the display PLL is enabled.
Thanks
Yakui.
>
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
>
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 75a9772..a1a15a6 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -89,7 +89,10 @@ static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
> static void intel_lvds_set_power(struct drm_device *dev, bool on)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> - u32 pp_status, ctl_reg, status_reg;
> + u32 pp_status, ctl_reg, status_reg, lvds_reg = LVDS;
> +
> + if (IS_IRONLAKE(dev))
> + lvds_reg = PCH_LVDS;
>
> if (IS_IRONLAKE(dev)) {
> ctl_reg = PCH_PP_CONTROL;
> @@ -100,6 +103,9 @@ static void intel_lvds_set_power(struct drm_device *dev, bool on)
> }
>
> if (on) {
> + I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
> + POSTING_READ(lvds_reg);
> +
> I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
> POWER_TARGET_ON);
> do {
> @@ -115,6 +121,9 @@ static void intel_lvds_set_power(struct drm_device *dev, bool on)
> do {
> pp_status = I915_READ(status_reg);
> } while (pp_status & PP_ON);
> +
> + I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
> + POSTING_READ(lvds_reg);
> }
> }
>
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