[Intel-gfx] [PATCH 3/3] drm/i915: Select the correct BPC for LVDS on Ironlake

[Zhenyu Wang]

On 2010.01.04 16:29:32 +0800, yakui.zhao at intel.com wrote:
> From: Zhao Yakui <yakui.zhao at intel.com>
> 
> Select the correct BPC for LVDS on Ironlake. If it is 18-bit LVDS panel,
> the BPC will be 6. When it is 24-bit LVDS panel, the BPC will 8.
> At the same time the BPC will be 8 when the output device is CRT/HDMI/DP.
> 
> Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   12 ++++++++++++
>  1 files changed, 12 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 31df26c..a7c85ce 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2993,6 +2993,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
>  
>  		/* determine panel color depth */
>  		temp = I915_READ(pipeconf_reg);
> +		temp &= ~PIPE_BPC_MASK;
> +		if (is_lvds) {
> +			int lvds_reg = I915_READ(PCH_LVDS);
> +			/* the BPC will be 6 if it is 18-bit LVDS panel */
> +			if ((lvds_reg & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
> +				temp |= PIPE_8BPC;
> +			else
> +				temp |= PIPE_6BPC;
> +		} else
> +			temp |= PIPE_8BPC;
> +		I915_WRITE(pipeconf_reg, temp);
> +		I915_READ(pipeconf_reg);
>  
>  		switch (temp & PIPE_BPC_MASK) {
>  		case PIPE_8BPC:

Looks fine with me.

Assume you've done testing on normal outputs, I'll help to test this on eDP port.

-- 
Open Source Technology Center, Intel ltd.

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