[Intel-gfx] [Patch 0/2] drm/i915: the patch set for DPLL clock

[yakui.zhao at intel.com]

From: Zhao Yakui <yakui.zhao at intel.com>

Hi, 
   This is a patch set for DPLL clock. It includes the following two patches:

   
[Patch 1/2]: Use the find_pll function to calculate the DPLL setting for
LVDS downclock.
           
[Patch 2/2]: Change the M/N/P limit on Ironlake. Use the M/N/P limit defined 
in spec on Ironlake.

thanks for the comments.

Best regards.
   Yakui