[Intel-gfx] [PATCH 2/2] drm/i915: Change the M/N/P range limit on Ironlake

[Eric Anholt]

On Wed,  6 Jan 2010 22:05:57 +0800, yakui.zhao at intel.com wrote:
> From: Zhao Yakui <yakui.zhao at intel.com>
> 
> Now we use the M/N/P range limit which is different with that in spec. In such case
> we can't get the matched M/N/P combination for the display clock of some modes.
> 
> So use the M/N/P range limit defined in spec for Ironlake.

I cleaned up this commit message to have a concise summary and not
restate the same thing 3 times.

commit 7f76f3c5950768f25ba2d5676e98dd028ca335e4
Author: Zhao Yakui <yakui.zhao at intel.com>
Date:   Wed Jan 6 22:05:57 2010 +0800

    drm/i915: Fix Ironlake M/N/P ranges to match the spec
    
    Without this fix, some modes couldn't find appropriate clocks.
    
    Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
    Signed-off-by: Eric Anholt <eric at anholt.net>
    Tested-by: Matthew Garrett <mjg at redhat.com>
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