[Intel-gfx] [PATCH] drm/i915: enable vblank interrupt on ironlake

Li Peng peng.li at linux.intel.com
Tue Jan 26 16:03:47 CET 2010


On Mon, Jan 25, 2010 at 03:33:13PM +0800, Zhenyu Wang wrote:
> On 2010.01.23 00:12:58 +0800, Li Peng wrote:
> > @@ -1015,7 +1022,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
> >  {
> >  	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> >  	/* enable kind of interrupts always enabled */
> > -	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT;
> > +	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
> > +			   DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
> >  	u32 render_mask = GT_USER_INTERRUPT;
> >  	u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
> >  			   SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
> 
> We should disable the vblank when init irq by setting the mask bit, so here
> we might remove them from initial mask bits, but only set enable bits right?	
> 

Yeah, I notice this too. Don't need to enable vblank at irq install. Just adding
them in the DEIER and mask in DEIMR should be OK. Please review this one.

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e7472d8..fcd87ad 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1022,14 +1022,13 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	/* enable kind of interrupts always enabled */
-	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
-			   DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
+	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT;
 	u32 render_mask = GT_USER_INTERRUPT;
 	u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
 			   SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
 
 	dev_priv->irq_mask_reg = ~display_mask;
-	dev_priv->de_irq_enable_reg = display_mask;
+	dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
 
 	/* should always can generate irq */
 	I915_WRITE(DEIIR, I915_READ(DEIIR));



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