[Intel-gfx] [PATCH] drm/i915: Make G4X-style PLL search more permissive

[Zhenyu Wang]

On 2010.07.02 16:43:30 -0400, Adam Jackson wrote:
> Fixes an Ironlake laptop with a 68.940MHz 1280x800 panel and 120MHz SSC
> reference clock.

This should fix #27471 too. I was hesitating if enlarge error range
or always choose the one with smallest error, as what we can tell from
our PLL sheet is just error result between real freq and recommended value,
but not max error range.

Would you cc stable too?

thanks.

-- 
Open Source Technology Center, Intel ltd.

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