[Intel-gfx] [PATCH 11/37] drm/i915: Only update LRU position of fence on success.
Chris Wilson
chris at chris-wilson.co.uk
Wed Mar 10 23:44:58 CET 2010
If we fail to set the domain when preparing to mmap a fenced object,
don't bother to more it to the front of the LRU fence list.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 15 +++++++--------
1 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b93f7e1..892be92 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1046,20 +1046,19 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
if (read_domains & I915_GEM_DOMAIN_GTT) {
ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0);
- /* Update the LRU on the fence for the CPU access that's
- * about to occur.
- */
- if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
- list_move_tail(&obj_priv->fence_list,
- &dev_priv->mm.fence_list);
- }
-
/* Silently promote "you're not bound, there was nothing to do"
* to success, since the client was just asking us to
* make sure everything was done.
*/
if (ret == -EINVAL)
ret = 0;
+
+ /* Update the LRU on the fence for the CPU access that's
+ * about to occur.
+ */
+ if (ret == 0 && obj_priv->fence_reg != I915_FENCE_REG_NONE)
+ list_move_tail(&obj_priv->fence_list,
+ &dev_priv->mm.fence_list);
} else {
ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0);
}
--
1.7.0
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