[Intel-gfx] [PATCH 1/4] introduce intel_ring_buffer structure

Eric Anholt eric.anholt at intel.com
Fri May 7 23:34:31 CEST 2010


On Thu,  6 May 2010 09:20:02 +0800, Zou Nan hai <nanhai.zou at intel.com> wrote:
> introduce intel_ring_buffer structure.
> sequential number, IRQ logic and hardware status page
> were included in the intel_ring_buffer structure

I tried to go apply this patch series once again.  The first one
actually applies now.  The second produces massive rejects, whether I apply
against linus master or drm-intel-next.

Please rebase against drm-intel-next, since that's where it will land.

I've gone ahead and merged master to -next now so that the final rebase
of this patch series (I sure hope) can be well-tested on that branch
with the PIPE_CONTROL fix.

And while you're fixing up the rebase to make sure it all works, a
couple of fixes:

> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> new file mode 100644
> index 0000000..65c540b
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -0,0 +1,576 @@
> +/*
> + * Copyright © 20010 Intel Corporation

It's 2010.

> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + *    Zou Nan hai <nanhai.zou at intel.com>
> + *    Xiang Hai hao<haihao.xiang at intel.com>
> + *
> + */
> +#include "drmP.h"
> +#include "drm.h"
> +#include "i915_drv.h"
> +#include "i915_drm.h"
> +#include "i915_trace.h"
> +
> +#define I915_GEM_GPU_DOMAINS	(~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))

Common definitions should go in header files (i915_drv.h here).

> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> new file mode 100644
> index 0000000..e3b40d1
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -0,0 +1,119 @@
> +#ifndef _INTEL_RINGBUFFER_H_
> +#define _INTEL_RINGBUFFER_H_
> +
> +struct  intel_hw_status_page {
> +	void 		*page_addr;
> +	unsigned int 	gfx_addr;
> +	struct 		drm_gem_object *obj;
> +};
> +
> +struct drm_i915_gem_execbuffer2;
> +struct  intel_ring_buffer {
> +	const char	*name;
> +	unsigned int	ring_flag;	
> +	unsigned long	size;
> +	unsigned int  	alignment;
> +	void 		*virtual_start;
> +	struct		drm_device *dev;
> +	struct 		drm_gem_object *gem_object;
> +
> +	unsigned int	head;
> +	unsigned int 	tail;
> +	unsigned int 	space;
> +	u32		next_seqno;
> +	struct intel_hw_status_page status_page;
> +
> +	u32		irq_gem_seqno; 		/* last seq seem at irq time */
> +	u32		waiting_gem_seqno;
> +	int		user_irq_refcount;
> +	void		(*user_irq_get)(struct drm_device *dev, 
> +			struct intel_ring_buffer *ring);
> +	void		(*user_irq_put)(struct drm_device *dev, 
> +			struct intel_ring_buffer *ring);
> +	void		(*setup_status_page)(struct drm_device *dev,
> +			struct	intel_ring_buffer *ring);
> +
> +	int		(*init)(struct drm_device *dev, 
> +			struct intel_ring_buffer *ring);
> +
> +	unsigned int	(*get_head)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring);
> +	unsigned int	(*get_tail)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring);
> +	unsigned int	(*get_active_head)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring);
> +	void		(*advance_ring)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring);
> +	void 		(*flush)(struct drm_device *dev, 
> +			struct intel_ring_buffer *ring,
> +			u32	invalidate_domains,
> +			u32	flush_domains);
> +	u32		(*add_request)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring,
> +			struct drm_file *file_priv,
> +			u32 flush_domains);	
> +	u32		(*get_gem_seqno)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring);
> +	int 		(*dispatch_gem_execbuffer)(struct drm_device *dev,
> +			struct intel_ring_buffer *ring,
> +			struct drm_i915_gem_execbuffer2 *exec,
> +			struct drm_clip_rect *cliprects,
> +			uint64_t exec_offset);
> +
> +	/**
> +	 * List of objects currently involved in rendering from the
> +	 * ringbuffer.
> +	 *
> +	 * Includes buffers having the contents of their GPU caches
> +	 * flushed, not necessarily primitives.  last_rendering_seqno
> +	 * represents when the rendering involved will be completed.
> +	 *
> +	 * A reference is held on the buffer while on this list.
> +	 */
> +	struct list_head active_list;
> +
> +	/**
> +	 * List of breadcrumbs associated with GPU requests currently
> +	 * outstanding.
> +	 */
> +	struct list_head request_list;
> +
> +	wait_queue_head_t irq_queue;
> +	drm_local_map_t map;
> +};
> +
> +static inline u32 
> +intel_read_status_page(struct intel_ring_buffer *ring,
> +		int reg)
> +{
> +	u32 *regs = ring->status_page.page_addr;
> +	return regs[reg];
> +}
> +
> +int intel_init_ring_buffer(struct drm_device *dev,
> +		struct intel_ring_buffer *ring);
> +void intel_cleanup_ring_buffer(struct drm_device *dev,
> +		struct intel_ring_buffer *ring);
> +int intel_wait_ring_buffer(struct drm_device *dev,
> +		struct intel_ring_buffer *ring, int n);
> +int intel_wrap_ring_buffer(struct drm_device *dev, 
> +		struct intel_ring_buffer *ring);
> +void intel_ring_begin(struct drm_device *dev,
> +		struct intel_ring_buffer *ring, int n);
> +void intel_ring_emit(struct drm_device *dev,
> +		struct intel_ring_buffer *ring, u32 data);
> +void intel_fill_struct(struct drm_device *dev,
> +		struct intel_ring_buffer *ring, 
> +		void *data,
> +		unsigned int len);
> +void intel_ring_advance(struct drm_device *dev, 
> +		struct intel_ring_buffer *ring);

Lots of trailing whitespace in this hunk.
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