[Intel-gfx] [PATCH 2/5] render: fix send instruction used in sampling fragments

[Xiang, Haihao]

To prepare for composite on Sandybridge

Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>
---
 src/render_program/exa_wm_mask_sample_a.g4a        |    3 ++-
 src/render_program/exa_wm_mask_sample_a.g4b        |    3 ++-
 src/render_program/exa_wm_mask_sample_a.g4b.gen5   |    3 ++-
 src/render_program/exa_wm_mask_sample_argb.g4a     |    3 ++-
 src/render_program/exa_wm_mask_sample_argb.g4b     |    3 ++-
 .../exa_wm_mask_sample_argb.g4b.gen5               |    3 ++-
 src/render_program/exa_wm_src_sample_a.g4a         |    3 ++-
 src/render_program/exa_wm_src_sample_a.g4b         |    3 ++-
 src/render_program/exa_wm_src_sample_a.g4b.gen5    |    3 ++-
 9 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/src/render_program/exa_wm_mask_sample_a.g4a b/src/render_program/exa_wm_mask_sample_a.g4a
index bbb19d7..b1c75af 100644
--- a/src/render_program/exa_wm_mask_sample_a.g4a
+++ b/src/render_program/exa_wm_mask_sample_a.g4a
@@ -36,12 +36,13 @@ include(`exa_wm.g4i')
 
 /* load only alpha */
 mov (1) g0.8<1>UD	0x00007000UD { align1 mask_disable };
+mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
 
 /* mask_msg will be copied with g0, as it contains send desc */
 /* emit sampler 'send' cmd */
 send (16) mask_msg_ind		/* msg reg index */
 	mask_sample_a_01<1>UW 	/* readback */
-	g0<8,8,1>UW		/* copy to msg start reg*/
+	null
 	sampler (2,1,F)		/* sampler message description, (binding_table,sampler_index,datatype)
 				/* here(src->dst) we should use src_sampler and src_surface */
 	mlen 5 rlen 2 { align1 };   /* required message len 5, readback len 8 */
diff --git a/src/render_program/exa_wm_mask_sample_a.g4b b/src/render_program/exa_wm_mask_sample_a.g4b
index 018bd36..7db47ca 100644
--- a/src/render_program/exa_wm_mask_sample_a.g4b
+++ b/src/render_program/exa_wm_mask_sample_a.g4b
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00007000 },
-   { 0x07800031, 0x23801d29, 0x008d0000, 0x02520102 },
+   { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 },
+   { 0x07800031, 0x23801c09, 0x00000000, 0x02520102 },
diff --git a/src/render_program/exa_wm_mask_sample_a.g4b.gen5 b/src/render_program/exa_wm_mask_sample_a.g4b.gen5
index d9740ac..472c2bb 100644
--- a/src/render_program/exa_wm_mask_sample_a.g4b.gen5
+++ b/src/render_program/exa_wm_mask_sample_a.g4b.gen5
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00007000 },
-   { 0x07800031, 0x23801d29, 0x208d0000, 0x0a2a0102 },
+   { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 },
+   { 0x07800031, 0x23801c09, 0x20000000, 0x0a2a0102 },
diff --git a/src/render_program/exa_wm_mask_sample_argb.g4a b/src/render_program/exa_wm_mask_sample_argb.g4a
index def4cfe..78bfc92 100644
--- a/src/render_program/exa_wm_mask_sample_argb.g4a
+++ b/src/render_program/exa_wm_mask_sample_argb.g4a
@@ -36,12 +36,13 @@ include(`exa_wm.g4i')
 
 /* load argb */
 mov (1) g0.8<1>UD	0x00000000UD { align1 mask_disable };
+mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
 
 /* mask_msg will be copied with g0, as it contains send desc */
 /* emit sampler 'send' cmd */
 send (16) mask_msg_ind		/* msg reg index */
 	mask_sample_base<1>UW 	/* readback */
-	g0<8,8,1>UW		/* copy to msg start reg*/
+	null
 	sampler (2,1,F)		/* sampler message description, (binding_table,sampler_index,datatype)
 				/* here(src->dst) we should use src_sampler and src_surface */
 	mlen 5 rlen 8 { align1 };   /* required message len 5, readback len 8 */
diff --git a/src/render_program/exa_wm_mask_sample_argb.g4b b/src/render_program/exa_wm_mask_sample_argb.g4b
index b159cba..9026ee2 100644
--- a/src/render_program/exa_wm_mask_sample_argb.g4b
+++ b/src/render_program/exa_wm_mask_sample_argb.g4b
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
-   { 0x07800031, 0x22c01d29, 0x008d0000, 0x02580102 },
+   { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 },
+   { 0x07800031, 0x22c01c09, 0x00000000, 0x02580102 },
diff --git a/src/render_program/exa_wm_mask_sample_argb.g4b.gen5 b/src/render_program/exa_wm_mask_sample_argb.g4b.gen5
index f0a6ddd..cb112d5 100644
--- a/src/render_program/exa_wm_mask_sample_argb.g4b.gen5
+++ b/src/render_program/exa_wm_mask_sample_argb.g4b.gen5
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
-   { 0x07800031, 0x22c01d29, 0x208d0000, 0x0a8a0102 },
+   { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 },
+   { 0x07800031, 0x22c01c09, 0x20000000, 0x0a8a0102 },
diff --git a/src/render_program/exa_wm_src_sample_a.g4a b/src/render_program/exa_wm_src_sample_a.g4a
index 552aaee..667bfb3 100644
--- a/src/render_program/exa_wm_src_sample_a.g4a
+++ b/src/render_program/exa_wm_src_sample_a.g4a
@@ -36,12 +36,13 @@ include(`exa_wm.g4i')
 
 /* load alpha */
 mov (1) g0.8<1>UD	0x00007000UD { align1 mask_disable };
+mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
 
 /* src_msg will be copied with g0, as it contains send desc */
 /* emit sampler 'send' cmd */
 send (16) src_msg_ind		/* msg reg index */
 	src_sample_a_01<1>UW 	/* readback */
-	g0<8,8,1>UW		/* copy to msg start reg*/
+	null
 	sampler (1,0,F)		/* sampler message description, (binding_table,sampler_index,datatype)
 				/* here(src->dst) we should use src_sampler and src_surface */
 	mlen 5 rlen 2 { align1 };   /* required message len 5, readback len 8 */
diff --git a/src/render_program/exa_wm_src_sample_a.g4b b/src/render_program/exa_wm_src_sample_a.g4b
index ce8650a..5e5a11f 100644
--- a/src/render_program/exa_wm_src_sample_a.g4b
+++ b/src/render_program/exa_wm_src_sample_a.g4b
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00007000 },
-   { 0x01800031, 0x22801d29, 0x008d0000, 0x02520001 },
+   { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+   { 0x01800031, 0x22801c09, 0x00000000, 0x02520001 },
diff --git a/src/render_program/exa_wm_src_sample_a.g4b.gen5 b/src/render_program/exa_wm_src_sample_a.g4b.gen5
index 8cd411c..0e4eebe 100644
--- a/src/render_program/exa_wm_src_sample_a.g4b.gen5
+++ b/src/render_program/exa_wm_src_sample_a.g4b.gen5
@@ -1,2 +1,3 @@
    { 0x00000201, 0x20080061, 0x00000000, 0x00007000 },
-   { 0x01800031, 0x22801d29, 0x208d0000, 0x0a2a0001 },
+   { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
+   { 0x01800031, 0x22801c09, 0x20000000, 0x0a2a0001 },
-- 
1.7.0.4