[Intel-gfx] [PATCH] intel: Fix emit_linear_blit to use DWORD aligned width blits
Peter Clifton
pcjc2 at cam.ac.uk
Tue Nov 9 12:34:52 CET 2010
On Tue, 2010-11-09 at 10:52 +0000, Peter Clifton wrote:
> On Sun, 2010-11-07 at 10:25 +0000, Chris Wilson wrote:
> I've not tried that yet, but the PRM does state that BLT pitch is in
> DWORDs.
Gah.. the PRM is badly written in places! In one place it states DWORDs,
then in another you get the actual detail:
"Source Pitch (Offset)
For non-XY Blits with color source operand (SRC_COPY_BLT), the signed
16bit field allows for specifying upto + 32Kbytes signed pitch in bytes
(same as before).
For X, Y Blits with tiled (X) surfaces, the pitch for Color Source will
be 512Byte aligned and should be programmable upto + 128Kbytes. In this
case, this 16bit signed pitch field is used to specify upto + 32KDWords.
For X, Y blits with nontiled color source surfaces (linear surfaces),
this 16bit field can be programmed to byte specification of upto +
32Kbytes (same as before).
"
The similar description for the Destination pitch field DOES NOT go into
any of this detail, nor refer to the source pitch entry.
I'm not sure where it is written that BLITs must be DWORD aligned for
non-tiled XY blits, but I certainly saw corruption on my G45 when it was
not, so my original patch (which Eric committed) seems to help.
Chris, I can try word-aligned if you wish, but am chasing some other
random GPU hangs / crashes at the moment. Fun fun ;)
(PS. Any idea where batchbuffer containing 3D commands, but with a
string of 6-8 MI_NOOP commands would come from? I can't find code to
emit like that in MESA or the 2D driver - I am wondering if the buffer
had become corrupted).
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
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