[Intel-gfx] PATCH: Fixup comment about alignment for BLT in Mesa

[Peter Clifton]

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-drm-intel-Add-assert-check-for-blitting-alignment.patch
Type: text/x-patch
Size: 1596 bytes
Desc: not available
URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20101109/673591df/attachment.bin>