[Intel-gfx] Does the i915 driver (and hardware) properly handle DPMS on/off?

[Chris Wilson]

On Fri, 8 Oct 2010 17:46:49 -0700, Bryan Freed <bfreed at chromium.org> wrote:
> Has this been reported before?

No, smells like a hardware issue. Though since we will do a full modeset
every time, there are quite a few paths that may fail. How many cycles
does it take to trigger the error?
 
> I dumped a bunch of i915 registers, but I do not see a significant
> difference between "working" and "not working".  Just some (undocumented, as
> far as I can tell) sequential counter at 0x61100 and a scanline counter at
> 0x71000.

0x61100 is the Analog Display Port Register (ADPA, or an FDI reg on
Ironlake+). Some reserved bits but nothing that indicates a sequential
counter.

0x71000 is indeed the pipe B Display Scan Line (DSL).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre