[Intel-gfx] [PATCH] drm/i915: Fix KMS regression on Sandybridge/CPT
Zhenyu Wang
zhenyuw at linux.intel.com
Fri Oct 29 04:34:51 CEST 2010
On 2010.10.28 10:50:04 +0100, Chris Wilson wrote:
>
> The POSTING_READs you added are no-ops since they are all followed by a
> read. The transconf should have the bpc in the register at this point or
> else we should have bugged much earlier. The break-exec-wait condition is
> still documented for gen6, augmented with an additional break-sempahore-wait
> and obviously per-ring, but this is unrelated to the changelog.
>
> I've shrunk the patch to just the FDI portion, pushed to staging for
> review.
Current drm-intel-staging still fails unfortunately..
> Let's try to keep patches as minimal as possible and addressing
> a single issue. (I'm as guilty of violating that as anyone.) Mostly so
> that we have a clear history of why/how the code works (and I don't break
> it later).
yeah, will do that, thanks for remind.
--
Open Source Technology Center, Intel ltd.
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