[Intel-gfx] [PATCH] enable BLT acceleate on gen6
Chris Wilson
chris at chris-wilson.co.uk
Fri Oct 29 10:39:35 CEST 2010
On Fri, 29 Oct 2010 13:18:32 +0800, Zou Nan hai <nanhai.zou at intel.com> wrote:
> uxa: enable BLT command on gen6,
> BLT command will goto BLT ring buffer
> on gen6.
Can we break this down into two patches?
1. enable BLT batches.
2. re-enable snb 2d.
[3. renaming i830_uxa]
> +#define RENDER_BATCH 0
> +#define BLT_BATCH 1
> + unsigned int current_batch;
If you use RENDER_BATCH=1, and BLT_BATCH=3, then...
> - if (ret == 0)
> - ret = dri_bo_exec(intel->batch_bo, intel->batch_used*4,
> - NULL, 0, 0xffffffff);
> + if (ret == 0) {
> + if (intel->current_batch == RENDER_BATCH)
> + ret = dri_bo_exec(intel->batch_bo, intel->batch_used*4,
> + NULL, 0, 0xffffffff);
> + else
> + ret = drm_intel_bo_mrb_exec(intel->batch_bo,
> + intel->batch_used*4,
> + NULL, 0, 0xffffffff, I915_EXEC_BLT);
> + }
just becomes:
if (ret == 0)
ret = drm_intel_bo_mrb_exec(intel->batch_bo,
intel->batch_used*4,
NULL, 0, 0xffffffff,
intel->current_batch)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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