[Intel-gfx] [PATCH] drm/i915: read/write IOCTLs

[Ben Widawsky]

On Sat, Apr 02, 2011 at 07:46:31AM +0100, Chris Wilson wrote:

> What I guess I was trying to express was that we need to be very clear
> what the interface is for and the limitations about its use.
> 
> For the more complicated set of registers, we can and should expose knobs
> in the debugfs to read and write them. For instance, to control the render
> clock frequencies and thresholds.
> 
> But perhaps we do need to reconsider the performance aspect. intel_gpu_top
> samples the ring HEAD and TAIL at around 10KHz and forcing gt-wake is
> about 50 microseconds... I hope I'm mistaken, because even batched that is
> doomed. Ben, do you mind checking that thought experiment with a little
> hard fact?

Here is the data from ~100 samples while playing playing Armacycles Advanced
measured off of d-i-f 7f58aabc369014fda3a4a33604ba0a1b63b941ac.

min	02.775us
max	19.402us
avg	07.057us
stddev	02.819us

When I do a cat /sys/kernel/debug/dri/0/i915_gem_interrupt, I always get
3 reads, in a similar pattern to this:

6) ! 285.852 us  |  __gen6_gt_force_wake_get();
6)   1.944 us    |  __gen6_gt_force_wake_get();
6)   1.854 us    |  __gen6_gt_force_wake_get();

Not sure why that case is so different.

> -Chris

Ben