[Intel-gfx] Trying to understand the URB code

[Ian Romanick]

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On 04/07/2011 01:24 AM, Zou, Nanhai wrote:
> Hi Ken,
> 	URB allocation on gen6 is different than previous gens.
> On previous gen, there is a total size urb for many stages of VS GS CLIP SF.
> So driver has to decide how much urb to allocate for each stage.
> 
> On gen6 only GS and VS will share an urb of 64k(32k on GT1)
> 
> urb_entry_number also has a limit, check 3DSTATE_URB command.

Ken and I did some research on this yesterday.  The bspec says the valid
range for the VS is [24, 256] on GT2 and [24, 128] on GT1.  For the GS
it says the valid range is [0, 256] on GT2 and [0, 254] on GT1.  I can't
believe that 254 is correct.

> The more urb entry number we have, the more current threads can spawn.
> 
> But 
> We should make sure 
> VS urb size = single_urb_size * gs_urb_entry 
> +
> GS urb size = single_urb_size * vs_urb_entry 
> < total_urb_size 
> 
> In most case, this is ok, unless we have a huge single_urb_size.
> 
> Since we are always using GS pass through mode for now.
> The number for GS urb dose not matter.
> So allocate more urb size for VS, less for GS may be better for huge urb_size
> 
> But consider we will support GS shader later and huge urb_size case is very rare,
> I separate urb equally for GS and VS.
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